公开(公告)号：US5351197A

公开(公告)日：1994-09-27

申请号：US824707

申请日：1992-01-21

申请人： Michael D. Upton ,  Thomas F. Rossman ,  Dean P. Frazier ,  Jay S. Fuller ,  Kendall C. Russell

发明人： Michael D. Upton ,  Thomas F. Rossman ,  Dean P. Frazier ,  Jay S. Fuller ,  Kendall C. Russell

IPC分类号： G06F17/50 ,  H01L27/02 ,  G06F15/60

CPC分类号： G06F17/5068 ,  H01L27/0207

摘要： A method and apparatus for determining integrated circuit layouts of a random access memory (RAM) from a virtual circuit description and specification of a process technology. Starting with high-level descriptions of a circuit, a virtual geometric description of the circuit is developed in terms of reference points relative to a substrate surface. When the process technology is specified, the relationships among the reference points is determined, as in the layout of the RAM. These relationships account for variable sizing of circuit features and pitch matching of circuit features. A connectivity model and a simulation model of the RAM are also produced by the method and apparatus. These model can be used to verify that the RAM is connected as desired and has the desired performance.

摘要翻译： 一种从虚拟电路描述和处理技术的规范确定随机存取存储器（RAM）的集成电路布局的方法和装置。 从电路的高级描述开始，基于相对于衬底表面的参考点开发电路的虚拟几何描述。 当指定处理技术时，确定参考点之间的关系，如RAM的布局。 这些关系涉及电路特征的可变尺寸和电路特征的音调匹配。 RAM的连接模型和仿真模型也由该方法和装置产生。 这些模型可用于验证RAM是否按需要连接并具有所需的性能。