公开(公告)号：US20160062913A1

公开(公告)日：2016-03-03

申请号：US14792156

申请日：2015-07-06

申请人： Deum-Ji WOO ,  Kwan-Ho KIM ,  Mi-Kyung KIM ,  Beom-Woo LEE

发明人： Deum-Ji WOO ,  Kwan-Ho KIM ,  Mi-Kyung KIM ,  Beom-Woo LEE

IPC分类号： G06F12/10 ,  G06F12/12 ,  G11C7/10 ,  G06F12/08

CPC分类号： G06F12/0893 ,  G06F12/0891

摘要： At least one example embodiment discloses a semiconductor device including a direct memory access (DMA) system configured to directly access a memory to write first data to an address of the memory, wherein the DMA system includes an initializer configured to set a data transfer parameter for writing the first data to the memory during a flushing period of second data from a cache to the address by a processor, a creator configured to create the first data based on the set data transfer parameter, and a transferer configured to write the first data to the address of the memory after the flushing period based on the data transfer parameter.

摘要翻译： 至少一个示例性实施例公开了一种半导体器件，其包括直接存储器访问（DMA）系统，其被配置为直接访问存储器以将第一数据写入存储器的地址，其中DMA系统包括初始化器，其被配置为将数据传输参数设置为 在处理器从缓存到地址的第二数据的刷新周期期间将第一数据写入存储器，被配置为基于所设置的数据传送参数创建第一数据的创建者，以及被配置为将第一数据写入到 基于数据传输参数的刷新周期后的内存地址。

公开(公告)号：US20120124262A1

公开(公告)日：2012-05-17

申请号：US13272589

申请日：2011-10-13

申请人： Hyuk Jae LEE ,  Kwon Taek Kwon ,  Seok Yoon Jung ,  Kyu Dong Kim ,  Deum Ji Woo

发明人： Hyuk Jae LEE ,  Kwon Taek Kwon ,  Seok Yoon Jung ,  Kyu Dong Kim ,  Deum Ji Woo

IPC分类号： G06F13/00

CPC分类号： G06F13/3625

摘要： A bus arbitration apparatus and method are provided. A plurality of masters may be classified into master types based on master characteristics, and bus arbitration may be performed. Thus, it is possible to prevent a bus from being distributed to a predetermined master, and it is possible to improve overall performance of a bus system by solving a problem of unbalanced distribution of performance between the plurality of masters.

摘要翻译： 提供总线仲裁装置和方法。 可以基于主特性将多个主机分类为主机类型，并且可以执行总线仲裁。 因此，可以防止总线分配到预定的主机，并且可以通过解决多个主机之间的性能不均衡分配的问题来改善总线系统的整体性能。

公开(公告)号：US09218308B2

公开(公告)日：2015-12-22

申请号：US13272589

申请日：2011-10-13

申请人： Hyuk Jae Lee ,  Kwon Taek Kwon ,  Seok Yoon Jung ,  Kyu Dong Kim ,  Deum Ji Woo

发明人： Hyuk Jae Lee ,  Kwon Taek Kwon ,  Seok Yoon Jung ,  Kyu Dong Kim ,  Deum Ji Woo

IPC分类号： G06F13/20 ,  G06F13/362

CPC分类号： G06F13/3625

摘要： A bus arbitration apparatus and method are provided. A plurality of masters may be classified into master types based on master characteristics, and bus arbitration may be performed. Thus, it is possible to prevent a bus from being distributed to a predetermined master, and it is possible to improve overall performance of a bus system by solving a problem of unbalanced distribution of performance between the plurality of masters.

摘要翻译： 提供总线仲裁装置和方法。 可以基于主特性将多个主机分类为主机类型，并且可以执行总线仲裁。 因此，可以防止总线分配到预定的主机，并且可以通过解决多个主机之间的性能不均衡分配的问题来改善总线系统的整体性能。

公开(公告)号：US09904626B2

公开(公告)日：2018-02-27

申请号：US14792156

申请日：2015-07-06

申请人： Deum-Ji Woo ,  Kwan-Ho Kim ,  Mi-Kyung Kim ,  Beom-Woo Lee

发明人： Deum-Ji Woo ,  Kwan-Ho Kim ,  Mi-Kyung Kim ,  Beom-Woo Lee

IPC分类号： G06F12/08 ,  G06F12/0893 ,  G06F12/0891

CPC分类号： G06F12/0893 ,  G06F12/0891

摘要： At least one example embodiment discloses a semiconductor device including a direct memory access (DMA) system configured to directly access a memory to write first data to an address of the memory, wherein the DMA system includes an initializer configured to set a data transfer parameter for writing the first data to the memory during a flushing period of second data from a cache to the address by a processor, a creator configured to create the first data based on the set data transfer parameter, and a transferer configured to write the first data to the address of the memory after the flushing period based on the data transfer parameter.