公开(公告)号：US08116406B2

公开(公告)日：2012-02-14

申请号：US12096119

申请日：2006-12-07

申请人： Dae-Ig Chang ,  Deock-Gil Oh ,  Kwang-Min Hyun ,  Dong-Weon Yoon ,  Sang-Kyu Park

发明人： Dae-Ig Chang ,  Deock-Gil Oh ,  Kwang-Min Hyun ,  Dong-Weon Yoon ,  Sang-Kyu Park

IPC分类号： H04L27/00

CPC分类号： H04L25/067 ,  H04L1/005 ,  H04L27/38

摘要： Provided are an apparatus and method for generating a soft bit metric and a multi-level (M-ary) Quadrature Amplitude Modulation (QAM) receiving system using the same. The apparatus includes an analog to digital converter for converting an analog symbol signal of a demodulated I (Inphase) or Q (Quadrature) channel into a digital signal, a scaler for scaling the converted digital signal based on a reference value used for determining a space between symbols, a positive integer converter for calculating a positive integer of the scaled digital I or Q channel symbol signal, a sign determinator for determining a sign of the scaled digital I or Q channel symbol signal, and a bit information converter for converting the scaled digital I or Q channel symbol signal into soft bit metric information per bit on the basis of the calculated positive integer and the determined sign value.

摘要翻译： 提供了一种用于生成软比特度量的装置和方法以及使用其的多级（M元）正交幅度调制（QAM）正交调制（QAM）接收系统。 该装置包括用于将解调的I（同相）或Q（正交）信道的模拟符号信号转换为数字信号的模数转换器，用于根据用于确定空间的参考值对转换的数字信号进行缩放的缩放器 在符号之间，用于计算缩放的数字I或Q信道符号信号的正整数的正整数转换器，用于确定缩放的数字I或Q信道符号信号的符号的符号确定器，以及用于将缩放的 基于计算的正整数和确定的符号值，将数字I或Q通道符号信号转换为每位的软比特度量信息。

公开(公告)号：US07321643B2

公开(公告)日：2008-01-22

申请号：US10662195

申请日：2003-09-12

申请人： Dae-Ig Chang ,  Dong-Weon Yoon ,  Nae-Soo Kim

发明人： Dae-Ig Chang ,  Dong-Weon Yoon ,  Nae-Soo Kim

IPC分类号： H04L27/06

CPC分类号： H04L25/067 ,  H04L27/38

摘要： Disclosed is a soft decision decoder, and a log likelihood ratio calculator for soft decision decoding and a method thereof, for realizing a generalized log likelihood ratio algorithm in consideration of channel estimation errors for performing soft decision decoding on QAM signals, which comprises multipliers for multiplying reference signals and channel estimation signals, subtractors for subtracting a receive signal of a receiver from output signals of the multipliers, first and second square calculators for squaring the subtractors' output signals and reference signals, dividers for dividing output signals of the first and second square calculators by addition values, and a comparator for comparing output signals of the dividers.

摘要翻译： 公开了一种软判决解码器和用于软判决解码的对数似然比计算器及其方法，用于考虑用于对QAM信号执行软判决解码的信道估计误差来实现广义对数似然比算法，其包括用于乘法的乘法器 参考信号和信道估计信号，用于从乘法器的输出信号中减去接收机的接收信号的减法器，用于平方减法器的输出信号和参考信号的第一和第二平方计算器，用于分割第一和第二正方形的输出信号的分频器 计算器，以及用于比较分频器的输出信号的比较器。

公开(公告)号：US20110103521A1

公开(公告)日：2011-05-05

申请号：US12734984

申请日：2008-09-01

申请人： Chang Wahn YU ,  Dong Weon Yoon ,  Kwang Min Hyun ,  Youn Ok Park ,  Dae Ho Kim ,  Jun-Woo Kim ,  Hyeong Sook Park ,  Seung Jae Bahng ,  Young Jo Bang ,  Kyung Yeol Sohn

发明人： Chang Wahn YU ,  Dong Weon Yoon ,  Kwang Min Hyun ,  Youn Ok Park ,  Dae Ho Kim ,  Jun-Woo Kim ,  Hyeong Sook Park ,  Seung Jae Bahng ,  Young Jo Bang ,  Kyung Yeol Sohn

IPC分类号： H04L27/06

CPC分类号： H04L25/067 ,  H04L1/005

摘要： Disclosed is a method and apparatus for composing a received symbol signal modulated with a bit reflected Gray code into bit information. According to an embodiment of the present invention, a positive integer of the received symbol signal having bits is assigned according to the Gray mapping rule, and a sign is determined. A value that is indicative of an arrangement of the bits constituting the received symbol signal is calculated. A boundary value in at least one bit group consisting of the bits constituting the received symbol signal is acquired, and a difference from an absolute value of the received symbol signal is calculated. The received symbol signal is converted into information per bit using a value of the received symbol signal based on the positive integer and the determined sign, the value that is indicative of the bit arrangement, and the difference from the absolute value. Therefore, it is possible to reduce complexity in bitwise decomposition for an iterative decoder inevitably used in a receiver.

摘要翻译： 公开了一种用于将被反映格雷码的位进行调制的接收符号信号组合成比特信息的方法和装置。 根据本发明的实施例，根据Gray映射规则分配具有位的接收符号信号的正整数，并且确定符号。 计算表示构成接收符号信号的位的排列的值。 获取由构成接收到的符号信号的比特组构成的至少一个比特组中的边界值，并且计算与接收到的符号信号的绝对值的差值。 基于正整数和确定的符号，指示比特排列的值以及与绝对值的差，使用接收到的符号信号的值将接收的符号信号转换为每位的信息。 因此，可以降低在接收机中不可避免地使用的迭代解码器的逐位分解的复杂度。

公开(公告)号：US08559566B2

公开(公告)日：2013-10-15

申请号：US12734984

申请日：2008-09-01

申请人： Chang Wahn Yu ,  Dong Weon Yoon ,  Kwang Min Hyun ,  Youn Ok Park ,  Dae Ho Kim ,  Jun-Woo Kim ,  Hyeong Sook Park ,  Seung Jae Bahng ,  Young Jo Bang ,  Kyung Yeol Sohn

发明人： Chang Wahn Yu ,  Dong Weon Yoon ,  Kwang Min Hyun ,  Youn Ok Park ,  Dae Ho Kim ,  Jun-Woo Kim ,  Hyeong Sook Park ,  Seung Jae Bahng ,  Young Jo Bang ,  Kyung Yeol Sohn

IPC分类号： H04L27/06

CPC分类号： H04L25/067 ,  H04L1/005

摘要： Disclosed is a method and apparatus for composing a received symbol signal modulated with a bit reflected Gray code into bit information. According to an embodiment of the present invention, a positive integer of the received symbol signal having bits is assigned according to the Gray mapping rule, and a sign is determined. A value that is indicative of an arrangement of the bits constituting the received symbol signal is calculated. A boundary value in at least one bit group consisting of the bits constituting the received symbol signal is acquired, and a difference from an absolute value of the received symbol signal is calculated. The received symbol signal is converted into information per bit using a value of the received symbol signal based on the positive integer and the determined sign, the value that is indicative of the bit arrangement, and the difference from the absolute value. Therefore, it is possible to reduce complexity in bitwise decomposition for an iterative decoder inevitably used in a receiver.

摘要翻译： 公开了一种用于将被反映格雷码的位进行调制的接收符号信号组合成比特信息的方法和装置。 根据本发明的实施例，根据Gray映射规则分配具有位的接收符号信号的正整数，并且确定符号。 计算表示构成接收符号信号的位的排列的值。 获取由构成接收到的符号信号的比特组构成的至少一个比特组中的边界值，并且计算与接收到的符号信号的绝对值的差值。 基于正整数和确定的符号，指示比特排列的值以及与绝对值的差，使用接收到的符号信号的值将接收的符号信号转换为每位的信息。 因此，可以降低在接收机中不可避免地使用的迭代解码器的逐位分解的复杂度。

公开(公告)号：US07019599B2

公开(公告)日：2006-03-28

申请号：US10501384

申请日：2003-01-14

申请人： Dong Weon Yoon

发明人： Dong Weon Yoon

IPC分类号： H03K7/00

CPC分类号： H04L27/362 ,  H03C1/50 ,  H03C3/40 ,  H03D1/2245 ,  H03D3/007 ,  H03D7/166 ,  H04L27/2017 ,  H04L27/3494 ,  H04L27/3836

摘要： An apparatus for continuous phase quadrature amplitude modulation and demodulation to continuously process phases and amplitudes at symbol change points in an M-ary quadrature amplitude modulation method. The apparatus includes a continuous phase quadrature modulator having a first multiplier multiplying an I-channel by a cosine wave weighted function, a second multiplier multiplying an output signal of the first multiplier by a cosine wave of a carrier frequency, a delay delaying a Q-channel by a predetermined time, a third multiplier multiplying the Q-channel by a sine wave weighted function, a fourth multiplier multiplying an output signal of the third multiplier by the sine wave of the carrier frequency, and an adder adding an output signal of the second multiplier and an output signal of the fourth multiplier; and a continuous phase quadrature demodulator having a fifth multiplier multiplying the I-channel by the cosine wave of the carrier frequency, a sixth multiplier multiplying a signal from the fifth multiplier by the cosine wave weighted function, a first integrator and sampler integrating a signal from the sixth multiplier for the symbol duration time, a seventh multiplier multiplying the Q-channel by the sine wave of the carrier frequency, an eighth multiplier multiplying a signal from the seventh multiplier by the sine wave weighted function, and a second integrator and sampler integrating a signal from the eighth multiplier by the symbol duration time.

摘要翻译： 一种用于连续相位正交幅度调制和解调的装置，用于在M进制正交幅度调制方法中连续处理符号变化点处的相位和幅度。 该装置包括：连续相位正交调制器，其具有第一乘法器，将I信道乘以余弦波加权函数，第二乘法器将第一乘法器的输出信号乘以载波余弦波;延迟延迟Q- 频道乘以预定时间，第三乘法器将Q信道乘以正弦波加权函数，第四乘法器将第三乘法器的输出信号乘以载波频率的正弦波，以及加法器将输出信号 第二乘法器和第四乘法器的输出信号; 以及具有第五乘法器的连续相位正交解调器，其具有将所述I信道乘以所述载波频率的余弦波，第六乘法器将来自所述第五乘法器的信号乘以余弦波加权函数;第一积分器和采样器， 符号持续时间的第六乘法器，第七乘法器将Q信道乘以载波频率的正弦波，第八乘法器将来自第七乘法器的信号乘以正弦波加权函数，以及第二积分器和采样器积分 来自第八乘数的符号持续时间的信号。

公开(公告)号：US20080285685A1

公开(公告)日：2008-11-20

申请号：US12096119

申请日：2006-12-07

申请人： Dae-Ig Chang ,  Deock-Gil Oh ,  Kwang-Min Hyun ,  Dong-Weon Yoon ,  Sang-Kyu Park

发明人： Dae-Ig Chang ,  Deock-Gil Oh ,  Kwang-Min Hyun ,  Dong-Weon Yoon ,  Sang-Kyu Park

IPC分类号： H04L27/38

CPC分类号： H04L25/067 ,  H04L1/005 ,  H04L27/38

摘要： Provided are an apparatus and method for generating a soft bit metric and a multi-level (M-ary) Quadrature Amplitude Modulation (QAM) receiving system using the same. The apparatus includes an analog to digital converter for converting an analog symbol signal of a demodulated I (Inphase) or Q (Quadrature) channel into a digital signal, a sealer for scaling the converted digital signal based on a reference value used for determining a space between symbols, a positive integer converter for calculating a positive integer of the scaled digital I or Q channel symbol signal, a sign determinator for determining a sign of the scaled digital I or Q channel symbol signal, and a bit information converter for converting the scaled digital I or Q channel symbol signal into soft bit metric information per bit on the basis of the calculated positive integer and the determined sign value.

摘要翻译： 提供了一种用于生成软比特度量的装置和方法以及使用其的多级（M元）正交幅度调制（QAM）正交调制（QAM）接收系统。 该装置包括用于将解调的I（同相）或Q（正交）信道的模拟符号信号转换为数字信号的模数转换器，用于基于用于确定空间的参考值缩放转换的数字信号的缩放器 在符号之间，用于计算缩放的数字I或Q信道符号信号的正整数的正整数转换器，用于确定缩放的数字I或Q信道符号信号的符号的符号确定器，以及用于将缩放的 基于计算的正整数和确定的符号值，将数字I或Q通道符号信号转换为每位的软比特度量信息。