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公开(公告)号：US09881401B2
公开(公告)日：2018-01-30
申请号：US12588459
申请日：2009-10-15
申请人： Jon Erik Oterhals , Jørn Nystad , Lars Ericsson , Eivind Liland , Daren Croxdord
发明人： Jon Erik Oterhals , Jørn Nystad , Lars Ericsson , Eivind Liland , Daren Croxdord
CPC分类号： G06T11/40
摘要： A transaction elimination hardware unit controls the writing to a frame buffer in a memory of tiles generated by a tile-based graphics processor. The transaction elimination hardware unit has a signature generator that generates a signature representative of the content of the tile for each tile. A signature comparator then compares the signature of a new tile received from the graphics processor with the signatures of one or more tiles already stored in the frame buffer to see if the signatures match. If the signatures do not match, then the signature comparator controls a write controller to write the new tile to the frame buffer. On the other hand, if the signatures match, then no data is written to the frame buffer and the existing tile is allowed to remain in the frame buffer. In this way, a tile is only written to the frame buffer if it is found by the signature comparison to differ from the tile or tiles that are already stored in the frame buffer that it is compared with.
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公开(公告)号：US20110102446A1
公开(公告)日：2011-05-05
申请号：US12923518
申请日：2010-09-24
申请人： Jon Erik Oterhals , Daren Croxford , Lars Ericsson , Jørn Nystad , Eivind Liland
发明人： Jon Erik Oterhals , Daren Croxford , Lars Ericsson , Jørn Nystad , Eivind Liland
IPC分类号： G06T1/60
CPC分类号： G06T11/40 , G09G5/363 , G09G5/393 , G09G5/395 , G09G2310/04 , G09G2320/103
摘要： A graphics processor 1 includes after its tile rendering logic 40, a transaction elimination unit 5 that includes data block generation logic 41 and block comparison logic 43. The block generation logic 41 generates data blocks from the rendered tiles produced by the tile rendering logic 40. The data blocks are then stored in buffers 42. Comparison logic 43 then compares a new data block with the previous data block (which will already be stored in the buffers 42), and generates an output metadata bit indicating whether the blocks can be considered to be the same or not, on the basis of the comparison. The meta-data output bits are stored appropriately in a meta-data bitmap 45 in main memory 2 that is associated with the output data array in question. If the blocks are determined to be different by the comparison logic then the new data block is written from the buffers 42 to the frame buffer 44 in the main memory 2. On the other hand, if the two blocks are considered to be similar to each other, the new block is not written into the data array in the frame buffer 44.
摘要翻译： 图形处理器1包括在其瓦片渲染逻辑40之后的包括数据块生成逻辑41和块比较逻辑43的事务消除单元5.块生成逻辑41从由瓦片渲染逻辑40产生的渲染瓦片生成数据块。 然后将数据块存储在缓冲器42中。然后，比较逻辑43将新的数据块与先前的数据块（其将已经存储在缓冲器42中）进行比较，并且产生一个输出元数据位，指示是否可以将块视为 在不同的基础上进行比较。 元数据输出位被适当地存储在与所讨论的输出数据阵列相关联的主存储器2中的元数据位图45中。 如果通过比较逻辑确定块是不同的，则将新数据块从缓冲器42写入主存储器2中的帧缓冲器44.另一方面，如果两个块被认为与每个块相似 另一方面，新的块不被写入帧缓冲器44中的数据阵列。
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公开(公告)号：US09996363B2
公开(公告)日：2018-06-12
申请号：US13435733
申请日：2012-03-30
申请人： Tom Cooksey , Jon Erik Oterhals , Jørn Nystad , Lars Ericsson , Eivind Liland , Daren Croxford
发明人： Tom Cooksey , Jon Erik Oterhals , Jørn Nystad , Lars Ericsson , Eivind Liland , Daren Croxford
CPC分类号： G06F9/451 , G06T1/60 , G09G5/14 , G09G5/393 , G09G5/397 , G09G2310/04 , G09G2320/103 , G09G2340/10 , G09G2360/122
摘要： In a compositing window system, as a respective version of the window for an application is written into a window buffer, a corresponding set of per tile signatures indicative of the content of each respective tile in the window buffer is generated and stored. When an updated version of the window is stored into a window buffer, the set of signature values for the updated version is compared to the set of signature values for the previous version in the window buffer to determine which tiles' content has changed. The set of tiles found to have changed is used to generate a set of regions for a window compositor to write to a window in a display frame buffer to update the window in the display frame buffer to display the new version of the window.
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公开(公告)号：US20120268480A1
公开(公告)日：2012-10-25
申请号：US13435733
申请日：2012-03-30
申请人： Tom COOKSEY , Jon Erik OTERHALS , Jørn NYSTAD , Lars ERICSSON , Eivind LILAND , Daren CROXFORD
发明人： Tom COOKSEY , Jon Erik OTERHALS , Jørn NYSTAD , Lars ERICSSON , Eivind LILAND , Daren CROXFORD
IPC分类号： G09G5/00
CPC分类号： G06F9/451 , G06T1/60 , G09G5/14 , G09G5/393 , G09G5/397 , G09G2310/04 , G09G2320/103 , G09G2340/10 , G09G2360/122
摘要： In a compositing window system, as a respective version of the window for an application is written into a window buffer, a corresponding set of per tile signatures indicative of the content of each respective tile in the window buffer is generated and stored. When an updated version of the window is stored into a window buffer, the set of signature values for the updated version is compared to the set of signature values for the previous version in the window buffer to determine which tiles' content has changed. The set of tiles found to have changed is used to generate a set of regions for a window compositor to write to a window in a display frame buffer to update the window in the display frame buffer to display the new version of the window.
摘要翻译： 在合成窗口系统中，由于应用程序的窗口的相应版本被写入窗口缓冲器，所以产生并存储指示窗口缓冲器中每个相应瓦片的内容的每个瓦片签名的对应集合。 当将更新版本的窗口存储到窗口缓冲器中时，将更新版本的签名值集合与窗口缓冲区中先前版本的签名值集合进行比较，以确定哪个瓦片的内容已更改。 发现改变的瓦片组用于生成一组区域，用于窗口合成器写入显示帧缓冲区中的窗口，以更新显示帧缓冲区中的窗口以显示新版本的窗口。
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5.发明授权公开(公告)号：US08059144B2
公开(公告)日：2011-11-15
申请号：US12659285
申请日：2010-03-03
申请人： Erik Faye-Lund , Jorn Nystad , Eivind Liland
发明人： Erik Faye-Lund , Jorn Nystad , Eivind Liland
摘要： A graphics processing apparatus 2 includes graphics processing pipelines 8. The graphics processing pipelines 8 include a programmable hardware stage 12, a pipeline memory 22 and writeback circuitry 16. Programmable resolving circuitry 18 is provided by the programmable hardware stage 12 within each pipeline and is responsive to one or more graphics program instructions to read pixel values at a first resolution generated within the pipeline memory 22 by pixel value generating circuitry 18 provided by the programmable hardware stage 12 and to perform a resolving operation upon these pixels values so as to generate pixel values at a second resolution. These pixel values at the second resolution are then written back to a frame buffer memory 6.
摘要翻译： 图形处理装置2包括图形处理管线8.图形处理流水线8包括可编程硬件级12，流水线存储器22和回读电路16.可编程分辨率电路18由每个流水线内的可编程硬件级12提供并且响应 涉及一个或多个图形程序指令，以通过由可编程硬件级12提供的像素值生成电路18在流水线存储器22内生成的第一分辨率读取像素值，并且对这些像素值执行解析操作以产生像素值 在第二个决议。 然后将第二分辨率的这些像素值写回帧缓冲存储器6。
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公开(公告)号：US20110074765A1
公开(公告)日：2011-03-31
申请号：US12588459
申请日：2009-10-15
申请人： Jon Erik Oterhals , Jorn Nystad , Lars Ericsson , Eivind Liland , Daren Croxford
发明人： Jon Erik Oterhals , Jorn Nystad , Lars Ericsson , Eivind Liland , Daren Croxford
CPC分类号： G06T11/40
摘要： A transaction elimination hardware unit 5 controls the writing to a frame buffer in a memory 2 of tiles generated by a tile-based graphics processor. The transaction elimination hardware unit 5 has a signature generator 20 that generates a signature representative of the content of the tile for each tile. A signature comparator 23 then compares the signature of a new tile received from the graphics processor with the signatures of one or more tiles already stored in the frame buffer to see if the signatures match. If the signatures do not match, then the signature comparator 23 controls a write controller 24 to write the new tile to the frame buffer. On the other hand, if the signatures match, then no data is written to the frame buffer and the existing tile is allowed to remain in the frame buffer. In this way, a tile is only written to the frame buffer if it is found by the signature comparison to differ from the tile or tiles that are already stored in the frame buffer that it is compared with.
摘要翻译： 事务消除硬件单元5控制对由基于瓦片的图形处理器生成的瓦片的存储器2中的帧缓冲器的写入。 交易消除硬件单元5具有签名生成器20，其生成代表每个瓦片的瓦片的内容的签名。 签名比较器23然后将从图形处理器接收的新瓦片的签名与已经存储在帧缓冲器中的一个或多个瓦片的签名进行比较，以查看签名是否匹配。 如果签名不匹配，则签名比较器23控制写入控制器24将新的块写入帧缓冲器。 另一方面，如果签名匹配，则没有数据被写入帧缓冲器，并且现有的块被允许保留在帧缓冲器中。 以这种方式，如果通过签名比较发现瓦片与已经存储在与其进行比较的帧缓冲器中的瓦片或瓦片不同，则瓦片仅被写入到帧缓冲器。
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公开(公告)号：US20100265254A1
公开(公告)日：2010-10-21
申请号：US12659284
申请日：2010-03-03
申请人： Eivind Liland , Erik Faye-Lund , Espen Amodt
发明人： Eivind Liland , Erik Faye-Lund , Espen Amodt
IPC分类号： G06T11/20
CPC分类号： G06T11/40
摘要： A filled shape is defined by edge data forming one or more boundaries thereof. Local shape data is generated from the edge data for each graphics region overlapped by the filled shape. The local shape data separately represents for each graphic region at least any edge of the filled shape within the graphics region and an overlap value indicative of a difference between a number of times the boundaries of the filled shape surround the region in a clockwise direction and the number of times the boundaries surround the region in a counter-clockwise direction. For each graphics region having local shape data, the local shape data is used to generate pixel values for pixels within that graphics region that are within the filled shape to be drawn.
摘要翻译： 填充形状由形成其一个或多个边界的边缘数据定义。 从与填充形状重叠的每个图形区域的边缘数据生成局部形状数据。 局部形状数据分别表示图形区域内的填充形状的至少任何边缘的每个图形区域，以及表示填充形状的边界围绕顺时针方向的区域的次数之间的差的重叠值，以及 边界以逆时针方向围绕该区域的次数。 对于具有局部形状数据的每个图形区域，使用局部形状数据来生成在该图形区域内的要绘制的填充形状内的像素的像素值。
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公开(公告)号：US09406155B2
公开(公告)日：2016-08-02
申请号：US12923518
申请日：2010-09-24
申请人： Jon Erik Oterhals , Daren Croxford , Lars Ericsson , Jørn Nystad , Eivind Liland
发明人： Jon Erik Oterhals , Daren Croxford , Lars Ericsson , Jørn Nystad , Eivind Liland
CPC分类号： G06T11/40 , G09G5/363 , G09G5/393 , G09G5/395 , G09G2310/04 , G09G2320/103
摘要： A graphics processor 1 includes after its tile rendering logic 40, a transaction elimination unit 5 that includes data block generation logic 41 and block comparison logic 43. The block generation logic 41 generates data blocks from the rendered tiles produced by the tile rendering logic 40. The data blocks are then stored in buffers 42. Comparison logic 43 then compares a new data block with the previous data block (which will already be stored in the buffers 42), and generates an output metadata bit indicating whether the blocks can be considered to be the same or not, on the basis of the comparison. The meta-data output bits are stored appropriately in a meta-data bitmap 45 in main memory 2 that is associated with the output data array in question. If the blocks are determined to be different by the comparison logic then the new data block is written from the buffers 42 to the frame buffer 44 in the main memory 2. On the other hand, if the two blocks are considered to be similar to each other, the new block is not written into the data array in the frame buffer 44.
摘要翻译： 图形处理器1包括在其瓦片渲染逻辑40之后的包括数据块生成逻辑41和块比较逻辑43的事务消除单元5.块生成逻辑41从由瓦片渲染逻辑40产生的渲染瓦片生成数据块。 然后将数据块存储在缓冲器42中。然后，比较逻辑43将新的数据块与先前的数据块（其将已经存储在缓冲器42中）进行比较，并且产生一个输出元数据位，指示是否可以将块视为 在不同的基础上进行比较。 元数据输出位被适当地存储在与所讨论的输出数据阵列相关联的主存储器2中的元数据位图45中。 如果通过比较逻辑确定块是不同的，则将新数据块从缓冲器42写入主存储器2中的帧缓冲器44.另一方面，如果两个块被认为与每个块相似 另一方面，新的块不被写入帧缓冲器44中的数据阵列。
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9.发明授权公开(公告)号：US08548962B2
公开(公告)日：2013-10-01
申请号：US13137432
申请日：2011-08-15
申请人： Joe D. Tapply , Eivind Liland , Sean T. Ellis
发明人： Joe D. Tapply , Eivind Liland , Sean T. Ellis
IPC分类号： G06F17/30
摘要： A data compressor has a delta value calculator which receives data items and determines if a related data item to a received data item is stored in a data store. If the related item is stored, the delta value calculator retrieves the related data item from the data store and calculates a delta value from the received data item and the related data item. If the related item is not stored, then the delta value is calculated from the received data item and a predetermined value. A data store controller accesses the data store in response to receipt of a data item and determines if a storage location is allocated to the data item. If there is an allocated storage location for the data item, the data item is stored in the allocated storage location; and if not then a storage location is allocated to the data item.
摘要翻译： 数据压缩器具有增量值计算器，其接收数据项并确定相关数据项对接收数据项是否存储在数据存储中。 如果相关项目被存储，则增量值计算器从数据存储器中检索相关的数据项，并根据接收的数据项和相关数据项计算增量值。 如果没有存储相关项目，则从接收到的数据项和预定值计算增量值。 数据存储控制器响应于数据项的接收而访问数据存储，并且确定存储位置是否被分配给数据项。 如果存在用于数据项的分配的存储位置，则数据项被存储在所分配的存储位置中; 如果不是，那么存储位置被分配给数据项。
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10.发明申请公开(公告)号：US20100265259A1
公开(公告)日：2010-10-21
申请号：US12659285
申请日：2010-03-03
申请人： Erik Faye-Lund , Jorn Nystad , Eivind Liland
发明人： Erik Faye-Lund , Jorn Nystad , Eivind Liland
IPC分类号： G06T1/20
摘要： A graphics processing apparatus 2 includes graphics processing pipelines 8. The graphics processing pipelines 8 include a programmable hardware stage 12, a pipeline memory 22 and writeback circuitry 16. Programmable resolving circuitry 18 is provided by the programmable hardware stage 12 within each pipeline and is responsive to one or more graphics program instructions to read pixel values at a first resolution generated within the pipeline memory 22 by pixel value generating circuitry 18 provided by the programmable hardware stage 12 and to perform a resolving operation upon these pixels values so as to generate pixel values at a second resolution. These pixel values at the second resolution are then written back to a frame buffer memory 6.
摘要翻译： 图形处理装置2包括图形处理管线8.图形处理流水线8包括可编程硬件级12，流水线存储器22和回读电路16.可编程分辨率电路18由每个流水线内的可编程硬件级12提供并且响应 涉及一个或多个图形程序指令，以通过由可编程硬件级12提供的像素值生成电路18在流水线存储器22内生成的第一分辨率读取像素值，并且对这些像素值执行解析操作以产生像素值 在第二个决议。 然后将第二分辨率的这些像素值写回帧缓冲存储器6。
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