COMBINED ENGINE FOR VIDEO AND GRAPHICS PROCESSING
    1.
    发明申请
    COMBINED ENGINE FOR VIDEO AND GRAPHICS PROCESSING 失效
    用于视频和图形处理的组合发动机

    公开(公告)号:US20080222332A1

    公开(公告)日:2008-09-11

    申请号:US12123282

    申请日:2008-05-19

    IPC分类号: G06F13/18

    摘要: The system includes an arbiter, a combined engine, a frame buffer, and a display processing unit. The arbiter provides three input channels: a first channel for graphics, a second channel for video and a third channel for processor. The arbiter performs prioritization and arbitration between the video and graphics and processor requests sent to the system. The arbiter has three output ports coupled to the combined engine. The combined engine is a hardware engine capable of processing either video data or graphics data. The output of the combined engine is provided to the frame buffer for the storage of pixel data. The output of the frame buffer is coupled to a display processing unit that renders the pixel data for display.

    摘要翻译: 该系统包括仲裁器,组合引擎,帧缓冲器和显示处理单元。 仲裁器提供三个输入通道:第一个图形通道,第二个视频通道和第三个处理器通道。 仲裁器在发送到系统的视频和图形以及处理器请求之间执行优先级排序和仲裁。 仲裁器具有耦合到组合引擎的三个输出端口。 组合引擎是能够处理视频数据或图形数据的硬件引擎。 组合引擎的输出被提供给帧缓冲器以用于存储像素数据。 帧缓冲器的输出耦合到显示处理单元,该显示处理单元呈现用于显示的像素数据。

    Combined engine for video and graphics processing
    2.
    发明授权
    Combined engine for video and graphics processing 失效
    用于视频和图形处理的组合引擎

    公开(公告)号:US07380036B2

    公开(公告)日:2008-05-27

    申请号:US11259558

    申请日:2005-10-25

    摘要: The system includes an arbiter, a combined engine, a frame buffer, and a display processing unit. The arbiter provides three input channels: a first channel for graphics, a second channel for video and a third channel for processor. The arbiter performs prioritization and arbitration between the video and graphics and processor requests sent to the system. The arbiter has three output ports coupled to the combined engine. The combined engine is a hardware engine capable of processing either video data or graphics data. The output of the combined engine is provided to the frame buffer for the storage of pixel data. The output of the frame buffer is coupled to a display processing unit that renders the pixel data for display.

    摘要翻译: 该系统包括仲裁器,组合引擎,帧缓冲器和显示处理单元。 仲裁器提供三个输入通道:第一个图形通道,第二个视频通道和第三个处理器通道。 仲裁器在发送到系统的视频和图形以及处理器请求之间执行优先级排序和仲裁。 仲裁器具有耦合到组合引擎的三个输出端口。 组合引擎是能够处理视频数据或图形数据的硬件引擎。 组合引擎的输出被提供给帧缓冲器以用于存储像素数据。 帧缓冲器的输出耦合到显示处理单元,该显示处理单元呈现用于显示的像素数据。