公开(公告)号：US06046982A

公开(公告)日：2000-04-04

申请号：US819273

申请日：1997-03-18

申请人： Cuneyt M. Ozveren ,  Ernest Grella ,  Jeffrey L. Cooper ,  Jerry D. Hutchison

发明人： Cuneyt M. Ozveren ,  Ernest Grella ,  Jeffrey L. Cooper ,  Jerry D. Hutchison

IPC分类号： H04L12/56 ,  H04J1/16 ,  H04J3/16 ,  H04L12/28

CPC分类号： H04L49/103 ,  H04L12/5602 ,  H04L49/108 ,  H04L49/3081 ,  H04L49/503 ,  H04L2012/5672 ,  H04L2012/5679 ,  H04L49/30

摘要： The input bandwidth of a data transfer device is increased by altering the conventional memory arbitration method in which a data cell is stored and a data cell is forwarded during each data transfer cycle. The input data rate is monitored and when the input data rate exceeds the maximum average throughput of the memory, the outcome of the memory arbitration cycle is changed so that the memory arbitration cycle consists of two stores (memory write operations) instead of one store and one forward (memory read operation.) In effect, the input memory arbitration process steals cycles from the output memory arbitration process when the input load exceeds that of the maximum average memory throughput. In accordance with one embodiment, the input data rate is monitored by examining input port FIFO buffers for the presence of data cells waiting for storage. Based on the results of the FIFO monitoring and the outcome of the current port arbitration cycle, a decision is made on the following port arbitration cycle whether to change the normal memory arbitration pattern.

摘要翻译： 通过改变在每个数据传输周期期间存储数据单元并且数据单元被转发的常规存储器仲裁方法来增加数据传送设备的输入带宽。 监视输入数据速率，并且当输入数据速率超过存储器的最大平均吞吐量时，改变存储器仲裁周期的结果，使得存储器仲裁周期由两个存储（存储器写操作）而不是一个存储器组成， 一个正向（存储器读取操作）实际上，当输入负载超过最大平均存储器吞吐量时，输入存储器仲裁过程从输出存储器仲裁过程中窃取循环。 根据一个实施例，通过检查输入端口FIFO缓冲器来监视等待存储的数据单元的存在来监视输入数据速率。 基于FIFO监视的结果和当前端口仲裁周期的结果，对以下端口仲裁周期做出是否改变正常存储器仲裁模式的决定。