公开(公告)号：US20120274854A1

公开(公告)日：2012-11-01

申请号：US13545909

申请日：2012-07-10

申请人： Fuminori Higashi

发明人： Fuminori Higashi

IPC分类号： H04N5/14

CPC分类号： H04N9/69 ,  G09G3/20 ,  G09G2320/0276 ,  H04N1/407 ,  H04N1/6027 ,  H04N5/202

摘要： A video signal processing apparatus (and method) includes a section determination unit which detects a non-equidistant section having different intervals between a plurality of sample points set for a range from a minimum signal level to a maximum signal level of a video signal to be inputted,a correction level holding unit which holds a signal level of a video signal after correction for each sample point as a correction level, and an interpolation computation unit which obtains a signal level of the video signal after correction corresponding to the signal level of the inputted video signal by executing cubic interpolation computation with reference to the correction level held by the correction level holding unit

摘要翻译： 视频信号处理装置（和方法）包括：区间确定单元，其检测在从最小信号电平到视频信号的最大信号电平的范围设置的多个采样点之间具有不同间隔的非等距区间 校正电平保持单元，其将每个采样点的校正后的视频信号的信号电平保持为校正电平;以及内插计算单元，其获得校正后的视频信号的信号电平，对应于信号电平的信号电平 参照由校正水平保持单元保持的校正电平，执行三次插值运算，输入视频信号

公开(公告)号：US20090086102A1

公开(公告)日：2009-04-02

申请号：US12222780

申请日：2008-08-15

申请人： Shinji Uchinuno ,  Fuminori Higashi

发明人： Shinji Uchinuno ,  Fuminori Higashi

IPC分类号： H04N5/202

CPC分类号： H04N5/202

摘要： A difference sample data holder of a gamma correction device holds as difference sample data a difference between a corrected signal level and a yet-to-be-corrected signal level for each of multiple sample points set at equal intervals between the permissible minimum and maximum levels of an input video signal. A correction execution unit performs cubic interpolation operation using the difference sample data held in the difference sample data holder, and adds the operated result and the signal level of the input video signal to obtain the signal level of the corrected video signal.

摘要翻译： 伽马校正装置的差分采样数据保持器保持作为差分采样数据，在允许的最小和最大电平之间以相等间隔设置的多个采样点中的每个采样点的校正信号电平和未修正信号电平之间的差异 的输入视频信号。 校正执行单元使用保持在差分采样数据保持器中的差分采样数据来执行三次插值运算，并且将运算结果和输入视频信号的信号电平相加，以获得校正后的视频信号的信号电平。

公开(公告)号：US09106877B2

公开(公告)日：2015-08-11

申请号：US13545909

申请日：2012-07-10

申请人： Fuminori Higashi

发明人： Fuminori Higashi

IPC分类号： H04N7/16 ,  H04N9/69 ,  G09G3/20 ,  H04N1/407 ,  H04N1/60 ,  H04N5/202

CPC分类号： H04N9/69 ,  G09G3/20 ,  G09G2320/0276 ,  H04N1/407 ,  H04N1/6027 ,  H04N5/202

摘要： A video signal processing apparatus (and method) includes a section determination unit which detects a non-equidistant section having different intervals between a plurality of sample points set for a range from a minimum signal level to a maximum signal level of a video signal to be inputted,correction level holding unit which holds a signal level of a video signal after correction for each sample point as a correction level, and an interpolation computation unit which obtains a signal level of the video signal after correction corresponding to the signal level of the inputted video signal by executing cubic interpolation computation with reference to the correction level held by the correction level holding unit.

摘要翻译： 视频信号处理装置（和方法）包括：区间确定单元，其检测在从最小信号电平到视频信号的最大信号电平的范围设置的多个采样点之间具有不同间隔的非等距区间 输入的校正电平保持单元，其将针对每个采样点的校正后的视频信号的信号电平保持为校正电平;以及插值计算单元，其获得与输入的信号电平相对应的校正后的视频信号的信号电平 参照由校正电平保持单元保持的校正电平执行三次插值运算的视频信号。

公开(公告)号：US08363168B2

公开(公告)日：2013-01-29

申请号：US12222780

申请日：2008-08-15

申请人： Shinji Uchinuno ,  Fuminori Higashi

发明人： Shinji Uchinuno ,  Fuminori Higashi

IPC分类号： H04N5/202

CPC分类号： H04N5/202

摘要： A difference sample data holder of a gamma correction device holds as difference sample data a difference between a corrected signal level and a yet-to-be-corrected signal level for each of multiple sample points set at equal intervals between the permissible minimum and maximum levels of an input video signal. A correction execution unit performs cubic interpolation operation using the difference sample data held in the difference sample data holder, and adds the operated result and the signal level of the input video signal to obtain the signal level of the corrected video signal.

公开(公告)号：US08248493B2

公开(公告)日：2012-08-21

申请号：US12216672

申请日：2008-07-09

申请人： Fuminori Higashi

发明人： Fuminori Higashi

IPC分类号： H04N5/202 ,  H04N9/69

CPC分类号： H04N9/69 ,  G09G3/20 ,  G09G2320/0276 ,  H04N1/407 ,  H04N1/6027 ,  H04N5/202

摘要： A video signal processing apparatus includes a non-equidistant section determination circuit, a sample data register, and an interpolation computation circuit. The non-equidistant section determination circuit detects a non-equidistant section having different intervals between plural sample points set for the dynamic range of a video signal to be inputted. The sample data register holds the signal level (correction level) of a video signal after correction for each sample point. The interpolation computation circuit obtains the signal level of the video signal after correction by executing cubic interpolation computation with reference to the correction level. Here, a first section is defined as a section located on a lower signal level side and having intervals of X (X>0) between sample points, and a second section is defined as a section located on a higher level side and having intervals of Y (Y>0, X≠Y) between sample points. With respect to the border point between the first and the second sections, the interpolation computation circuit obtains the signal level of the video signal after correction by use of the correction level of a sample point added so that the second section can be formed on the lower level side and/or the first section can be formed on the higher level side.

摘要翻译： 视频信号处理装置包括非等距段确定电路，采样数据寄存器和插值计算电路。 非等距段确定电路检测在要输入的视频信号的动态范围设置的多个采样点之间具有不同间隔的非等距区间。 采样数据寄存器保持每个采样点的校正后的视频信号的信号电平（校正电平）。 内插计算电路通过参照校正电平执行三次插值计算来获得校正后的视频信号的信号电平。 这里，第一部分被定义为位于下信号电平侧并且在采样点之间具有X（X> 0）的间隔的部分，并且第二部分被定义为位于较高级侧并且具有 采样点之间的Y（Y> 0，X≠Y）。 对于第一和第二部分之间的边界点，内插计算电路通过使用加法采样点的校正电平来获得校正后的视频信号的信号电平，使得第二部分可以形成在下部 高级侧和/或第一部分可以形成在较高级侧。

公开(公告)号：US20080069465A1

公开(公告)日：2008-03-20

申请号：US11898458

申请日：2007-09-12

申请人： Fuminori Higashi

发明人： Fuminori Higashi

IPC分类号： G06K9/36

CPC分类号： G06T1/60

摘要： When performing arithmetic processing on unprocessed image data with use of a target pixel and reference pixels in its proximity, buffers of a number corresponding to the number of lines required for the arithmetic processing, which are a first buffer and a second buffer, are used as intermediate storage units. Each buffer has a capacity that is smaller than a size of a line of the unprocessed image data and equal to or larger than a size required for the arithmetic processing in a main scanning direction. In each arithmetic processing, a pixel from each line in the unprocessed image data is input one by one to a storage region at the right end of a corresponding buffer, and a pixel is read and output from each position of each buffer that is determined according to a positional relationship between a target pixel and its reference pixel. Each time arithmetic processing is performed in each line, data is shifted one pixel from the right end to the left end in the first buffer and the second buffer.

摘要翻译： 当使用目标像素和其附近的参考像素对未处理的图像数据执行算术处理时，将与作为第一缓冲器和第二缓冲器的算术处理所需的行数相对应的数量的缓冲器用作 中间存储单元。 每个缓冲器的容量小于未处理的图像数据的行的大小，并且等于或大于在主扫描方向上的算术处理所需的尺寸。 在每个算术处理中，将来自未处理图像数据中的每行的像素一个一个地输入到相应缓冲器的右端的存储区域，并且从每个缓冲器的每个位置读取并输出像素，该每个位置根据 涉及目标像素与其参考像素之间的位置关系。 每次在每行执行运算处理时，数据从第一缓冲器和第二缓冲器中的右端向左端移动一个像素。

公开(公告)号：US20090027559A1

公开(公告)日：2009-01-29

申请号：US12216672

申请日：2008-07-09

申请人： Fuminori Higashi

发明人： Fuminori Higashi

IPC分类号： H04N5/202 ,  H04N5/14

CPC分类号： H04N9/69 ,  G09G3/20 ,  G09G2320/0276 ,  H04N1/407 ,  H04N1/6027 ,  H04N5/202

摘要： A video signal processing apparatus includes a non-equidistant section determination circuit, a sample data register, and an interpolation computation circuit. The non-equidistant section determination circuit detects a non-equidistant section having different intervals between plural sample points set for the dynamic range of a video signal to be inputted. The sample data register holds the signal level (correction level) of a video signal after correction for each sample point. The interpolation computation circuit obtains the signal level of the video signal after correction by executing cubic interpolation computation with reference to the correction level. Here, a first section is defined as a section located on a lower signal level side and having intervals of X (X>0) between sample points, and a second section is defined as a section located on a higher level side and having intervals of Y (Y>0, X≠Y) between sample points. With respect to the border point between the first and the second sections, the interpolation computation circuit obtains the signal level of the video signal after correction by use of the correction level of a sample point added so that the second section can be formed on the lower level side and/or the first section can be formed on the higher level side.

摘要翻译： 视频信号处理装置包括非等距段确定电路，采样数据寄存器和插值计算电路。 非等距段确定电路检测在要输入的视频信号的动态范围设置的多个采样点之间具有不同间隔的非等距区间。 采样数据寄存器保持每个采样点的校正后的视频信号的信号电平（校正电平）。 内插计算电路通过参照校正电平执行三次插值计算来获得校正后的视频信号的信号电平。 这里，第一部分被定义为位于下信号电平侧并且在采样点之间具有X（X> 0）的间隔的部分，并且第二部分被定义为位于较高级侧并且具有 Y（Y> 0，X

公开(公告)号：US07933465B2

公开(公告)日：2011-04-26

申请号：US11898458

申请日：2007-09-12

申请人： Fuminori Higashi

发明人： Fuminori Higashi

IPC分类号： G06K9/36

CPC分类号： G06T1/60

摘要： When performing arithmetic processing on unprocessed image data with use of a target pixel and reference pixels in its proximity, buffers of a number corresponding to the number of lines required for the arithmetic processing, which are a first buffer and a second buffer, are used as intermediate storage units. Each buffer has a capacity that is smaller than a size of a line of the unprocessed image data and equal to or larger than a size required for the arithmetic processing in a main scanning direction. In each arithmetic processing, a pixel from each line in the unprocessed image data is input one by one to a storage region at the right end of a corresponding buffer, and a pixel is read and output from each position of each buffer that is determined according to a positional relationship between a target pixel and its reference pixel. Each time arithmetic processing is performed in each line, data is shifted one pixel from the right end to the left end in the first buffer and the second buffer.

摘要翻译： 当使用目标像素和其附近的参考像素对未处理的图像数据执行算术处理时，将与作为第一缓冲器和第二缓冲器的算术处理所需的行数相对应的数量的缓冲器用作 中间存储单元。 每个缓冲器的容量小于未处理的图像数据的行的大小，并且等于或大于在主扫描方向上的算术处理所需的尺寸。 在每个算术处理中，将来自未处理图像数据中的每行的像素一个一个地输入到相应缓冲器的右端的存储区域，并且从每个缓冲器的每个位置读取并输出像素，该每个位置根据 涉及目标像素与其参考像素之间的位置关系。 每次在每行执行运算处理时，数据从第一缓冲器和第二缓冲器中的右端向左端移动一个像素。

公开(公告)号：US20090051818A1

公开(公告)日：2009-02-26

申请号：US12193418

申请日：2008-08-18

申请人： Takashi FURUKAWA ,  Fuminori HIGASHI

发明人： Takashi FURUKAWA ,  Fuminori HIGASHI

IPC分类号： H04N5/202 ,  H04N5/66

CPC分类号： H04N5/202 ,  G09G3/20 ,  G09G2320/0673

摘要： A video signal processing device includes a sample data register to hold a signal level of a video signal after correction at each sample point as a correction level, a coefficient operation circuit to output a first coefficient, a coefficient selection circuit to output a second coefficient, and an interpolation operation unit to calculate a signal level of a video signal after correction corresponding to a signal level of the input video signal by using the correction level held in the sample data register, the first coefficient or the second coefficient and performing the cubic interpolation operation or the linear interpolation operation. The first coefficient is used when a video signal after correction is obtained from the input video signal by a linear interpolation operation. The second coefficient is used when a video signal after correction is obtained from the input video signal by a cubic interpolation operation.

摘要翻译： 视频信号处理装置包括：采样数据寄存器，用于将每个采样点的校正后的视频信号的信号电平保持为校正电平;输出第一系数的系数运算电路;输出第二系数的系数选择电路; 以及内插运算单元，通过使用保持在采样数据寄存器中的校正电平，第一系数或第二系数来计算对应于输入视频信号的信号电平的校正后的视频信号的信号电平，并执行三次插值 操作或线性插补操作。 当通过线性内插操作从输入视频信号获得校正后的视频信号时，使用第一系数。 当通过三次插值操作从输入视频信号获得校正后的视频信号时，使用第二系数。