公开(公告)号：US4472688A

公开(公告)日：1984-09-18

申请号：US386622

申请日：1982-06-09

Applicant: Funada Saburo ,  Tatsuhiko Okuma ,  Kazumasa Sakai

Inventor： Funada Saburo ,  Tatsuhiko Okuma ,  Kazumasa Sakai

IPC: H03F1/02 ,  H03F3/04 ,  H03F3/26

CPC classification number: H03F1/0244

Abstract: A voltage switching amplifier circuit has a comparator which, after comparing signal amplitude to a comparison voltage, switches on a high voltage or low voltage amplifier depending upon whether the comparison voltage is exceeded or not. After the predetermined comparison voltage is exceeded, a positive feedback circuit reduces the comparison voltage enabling the high voltage amplifier to continue operation at least until the signal amplitude drops below the reduced comparison voltage. In a preferred embodiment, a time constant circuit maintains the high voltage amplifier in operation for a predetermined period of time during which the signal amplitude has dropped below and remained below the reduced comparison voltage.

Abstract translation: 电压开关放大器电路具有比较器，其在将信号幅度与比较电压进行比较之后，根据是否超过比较电压来接通高压或低压放大器。 在超过预定比较电压之后，正反馈电路减小比较电压，使得高电压放大器至少直到信号幅度降低到降低的比较电压以下来继续工作。 在优选实施例中，时间常数电路将高电压放大器保持工作在预定的时间段内，在该预定时间段期间，信号幅度已经降到低于并且保持低于降低的比较电压。