公开(公告)号：US07702963B2

公开(公告)日：2010-04-20

申请号：US10978904

申请日：2004-11-01

申请人： Robert L. Wallace ,  Gary C. Messer ,  Phillip C. Jerzak

发明人： Robert L. Wallace ,  Gary C. Messer ,  Phillip C. Jerzak

IPC分类号： G06F11/00

CPC分类号： G06F11/277

摘要： A method and system are described for distributing at least one clock signal between shelves in a multi-shelf modular computing system includes a clock signal generator for generating a first clock signal, an inter-shelf bus for carrying the first clock signal to a second shelf, and a first shelf manager module, associated with the second shelf, for receiving and regenerating the first clock signal and providing the regenerated first clock signal to at least one module within the second shelf. A system and method for detecting a location of a fault in an inter-shelf bus in a multi-shelf modular computing system is also disclosed. A power source applies a bias between at least two conductors of the inter-shelf bus. At least one module detects the applied bias to determine if a fault is located between the at least one shelf and the power source.

摘要翻译： 描述了一种方法和系统，用于在多架模块计算系统中的架之间分配至少一个时钟信号，包括用于产生第一时钟信号的时钟信号发生器，用于将第一时钟信号传送到第二机架的货架间总线 以及与第二机架相关联的第一货架管理器模块，用于接收和再生第一时钟信号，并将再生的第一时钟信号提供给第二机架内的至少一个模块。 还公开了一种用于检测多架模块化计算系统中的货架间总线故障位置的系统和方法。 电源在货架间总线的至少两根导线之间施加偏压。 至少一个模块检测施加的偏置以确定故障是否位于至少一个货架和电源之间。