公开(公告)号：US08086806B2

公开(公告)日：2011-12-27

申请号：US12054330

申请日：2008-03-24

申请人： Lars Nyland ,  John R. Nickolls ,  Gentaro Hirota ,  Tanmoy Mandal

发明人： Lars Nyland ,  John R. Nickolls ,  Gentaro Hirota ,  Tanmoy Mandal

IPC分类号： G06F12/00

CPC分类号： G06F9/3824 ,  G06F9/3851 ,  G06F9/3885 ,  G06F9/3891

摘要： One embodiment of the present invention sets forth a technique for efficiently and flexibly performing coalesced memory accesses for a thread group. For each read application request that services a thread group, the core interface generates one pending request table (PRT) entry and one or more memory access requests. The core interface determines the number of memory access requests and the size of each memory access request based on the spread of the memory access addresses in the application request. Each memory access request specifies the particular threads that the memory access request services. The PRT entry tracks the number of pending memory access requests. As the memory interface completes each memory access request, the core interface uses information in the memory access request and the corresponding PRT entry to route the returned data. When all the memory access requests associated with a particular PRT entry are complete, the core interface satisfies the corresponding application request and frees the PRT entry.

摘要翻译： 本发明的一个实施例提出了一种用于有效且灵活地执行线程组合的存储器访问的技术。 对于为线程组服务的每个读取应用程序请求，核心接口生成一个未决请求表（PRT）条目和一个或多个内存访问请求。 核心接口基于应用程序请求中的存储器访问地址的扩展来确定存储器访问请求的数量和每个存储器访问请求的大小。 每个存储器访问请求指定存储器访问请求服务的特定线程。 PRT条目跟踪挂起的内存访问请求的数量。 当存储器接口完成每个存储器访问请求时，核心接口使用存储器访问请求中的信息和对应的PRT条目来路由返回的数据。 当与特定PRT条目相关联的所有存储器访问请求完成时，核心接口满足相应的应用请求并释放PRT条目。

公开(公告)号：US6064749A

公开(公告)日：2000-05-16

申请号：US691684

申请日：1996-08-02

申请人： Gentaro Hirota ,  Andrei State

发明人： Gentaro Hirota ,  Andrei State

IPC分类号： G06K9/00 ,  G06T7/00

CPC分类号： G06K9/3216 ,  G06F3/011 ,  G06T19/006 ,  G06T7/0042

摘要： Systems, methods and computer program products which have the registration accuracy of vision-based tracking systems and the robustness of magnetic tracking systems. Video tracking of landmarks is utilized as the primary method for determining camera position and orientation but is enhanced by magnetic or other forms of physical tracking camera movement and orientation. A physical tracker narrows the landmark search area on images, speeding up the landmark search process. Information from the physical tracker may also be used to select one of several solutions of a non-linear equation resulting from the vision-based tracker. The physical tracker may also act as a primary tracker if the image analyzer cannot locate enough landmarks to provide proper registration, thus, avoiding complete loss of registration. Furthermore, if 1 or 2 landmarks (not enough for a unique solution) are detected, several may be utilized heuristic methods are used to minimize registration loss. Catastrophic failure may be avoided by monitoring the difference between results from the physical tracker and the vision-based tracker and discarding corrections that exceed a certain magnitude. The hybrid tracking system is equally applicable to see-through and video augmented reality systems.

摘要翻译： 具有基于视觉的跟踪系统的注册精度和磁跟踪系统的鲁棒性的系统，方法和计算机程序产品。 地图的视频跟踪被用作确定摄像机位置和姿态的主要方法，但是通过磁性或其他形式的物理跟踪摄像机移动和取向来增强。 物理跟踪器缩小了图像上的地标搜索区域，加快了地标搜索过程。 来自物理跟踪器的信息也可用于选择由基于视觉的跟踪器产生的非线性方程式的若干解之一。 如果图像分析仪无法找到足够的地标来提供正确的注册，物理跟踪器也可以作为主要跟踪器，从而避免完全丢失注册。 此外，如果检测到1或2个地标（对于唯一解决方案不够），则可以使用几个启发式方法来最小化注册丢失。 可以通过监视来自物理跟踪器和基于视觉的跟踪器的结果之间的差异以及丢弃超过一定幅度的校正来避免灾难性故障。 混合跟踪系统同样适用于透视和视频增强现实系统。

公开(公告)号：US09069609B2

公开(公告)日：2015-06-30

申请号：US13353150

申请日：2012-01-18

申请人： Karim M. Abdalla ,  Lacky V. Shah ,  Jerome F. Duluk, Jr. ,  Timothy John Purcell ,  Tanmoy Mandal ,  Gentaro Hirota

发明人： Karim M. Abdalla ,  Lacky V. Shah ,  Jerome F. Duluk, Jr. ,  Timothy John Purcell ,  Tanmoy Mandal ,  Gentaro Hirota

IPC分类号： G06F9/46 ,  G06F9/48 ,  G06F9/50

CPC分类号： G06F9/4881 ,  G06F9/4806 ,  G06F9/50 ,  G06F2209/483

摘要： One embodiment of the present invention sets forth a technique for assigning a compute task to a first processor included in a plurality of processors. The technique involves analyzing each compute task in a plurality of compute tasks to identify one or more compute tasks that are eligible for assignment to the first processor, where each compute task is listed in a first table and is associated with a priority value and an allocation order that indicates relative time at which the compute task was added to the first table. The technique further involves selecting a first task compute from the identified one or more compute tasks based on at least one of the priority value and the allocation order, and assigning the first compute task to the first processor for execution.

摘要翻译： 本发明的一个实施例提出了一种用于将计算任务分配给包括在多个处理器中的第一处理器的技术。 该技术涉及分析多个计算任务中的每个计算任务以识别符合分配给第一处理器的一个或多个计算任务，其中每个计算任务在第一表中列出并且与优先级值和分配 指示将计算任务添加到第一个表的相对时间的顺序。 该技术还包括基于优先级值和分配顺序中的至少一个从所识别的一个或多个计算任务中选择第一任务计算，以及将第一计算任务分配给第一处理器以供执行。

公开(公告)号：US20090240895A1

公开(公告)日：2009-09-24

申请号：US12054330

申请日：2008-03-24

申请人： Lars Nyland ,  John R. Nickolls ,  Gentaro Hirota ,  Tanmoy Mandal

发明人： Lars Nyland ,  John R. Nickolls ,  Gentaro Hirota ,  Tanmoy Mandal

IPC分类号： G06F12/00

CPC分类号： G06F9/3824 ,  G06F9/3851 ,  G06F9/3885 ,  G06F9/3891

摘要： One embodiment of the present invention sets forth a technique for efficiently and flexibly performing coalesced memory accesses for a thread group. For each read application request that services a thread group, the core interface generates one pending request table (PRT) entry and one or more memory access requests. The core interface determines the number of memory access requests and the size of each memory access request based on the spread of the memory access addresses in the application request. Each memory access request specifies the particular threads that the memory access request services. The PRT entry tracks the number of pending memory access requests. As the memory interface completes each memory access request, the core interface uses information in the memory access request and the corresponding PRT entry to route the returned data. When all the memory access requests associated with a particular PRT entry are complete, the core interface satisfies the corresponding application request and frees the PRT entry.

摘要翻译： 本发明的一个实施例提出了一种用于有效且灵活地执行线程组合的存储器访问的技术。 对于为线程组服务的每个读取应用程序请求，核心接口生成一个未决请求表（PRT）条目和一个或多个内存访问请求。 核心接口基于应用程序请求中的存储器访问地址的扩展来确定存储器访问请求的数量和每个存储器访问请求的大小。 每个存储器访问请求指定存储器访问请求服务的特定线程。 PRT条目跟踪挂起的内存访问请求的数量。 当存储器接口完成每个存储器访问请求时，核心接口使用存储器访问请求中的信息和对应的PRT条目来路由返回的数据。 当与特定PRT条目相关联的所有存储器访问请求完成时，核心接口满足相应的应用请求并释放PRT条目。

公开(公告)号：US09715413B2

公开(公告)日：2017-07-25

申请号：US13353155

申请日：2012-01-18

申请人： Karim M. Abdalla ,  Lacky V. Shah ,  Jerome F. Duluk, Jr. ,  Timothy John Purcell ,  Tanmoy Mandal ,  Gentaro Hirota

发明人： Karim M. Abdalla ,  Lacky V. Shah ,  Jerome F. Duluk, Jr. ,  Timothy John Purcell ,  Tanmoy Mandal ,  Gentaro Hirota

IPC分类号： G06F9/46 ,  G06F13/00 ,  G06F9/50

CPC分类号： G06F9/505 ,  G06F2209/503

摘要： One embodiment of the present invention sets forth a technique for selecting a first processor included in a plurality of processors to receive work related to a compute task. The technique involves analyzing state data of each processor in the plurality of processors to identify one or more processors that have already been assigned one compute task and are eligible to receive work related to the one compute task, receiving, from each of the one or more processors identified as eligible, an availability value that indicates the capacity of the processor to receive new work, selecting a first processor to receive work related to the one compute task based on the availability values received from the one or more processors, and issuing, to the first processor via a cooperative thread array (CTA), the work related to the one compute task.

公开(公告)号：US08392669B1

公开(公告)日：2013-03-05

申请号：US12324751

申请日：2008-11-26

申请人： Lars Nyland ,  John R. Nickolls ,  Gentaro Hirota ,  Tanmoy Mandal

发明人： Lars Nyland ,  John R. Nickolls ,  Gentaro Hirota ,  Tanmoy Mandal

IPC分类号： G06F12/00 ,  G06F13/00 ,  G06F13/28 ,  G11C29/00

CPC分类号： G06F9/3885 ,  G06F9/3851 ,  G06F9/3887

摘要： One embodiment of the present invention sets forth a technique for efficiently and flexibly performing coalesced memory accesses for a thread group. For each read application request that services a thread group, the core interface generates one pending request table (PRT) entry and one or more memory access requests. The core interface determines the number of memory access requests and the size of each memory access request based on the spread of the memory access addresses in the application request. Each memory access request specifies the particular threads that the memory access request services. The PRT entry tracks the number of pending memory access requests. As the memory interface completes each memory access request, the core interface uses information in the memory access request and the corresponding PRT entry to route the returned data. When all the memory access requests associated with a particular PRT entry are complete, the core interface satisfies the corresponding application request and frees the PRT entry.

摘要翻译： 本发明的一个实施例提出了一种用于有效且灵活地执行线程组合的存储器访问的技术。 对于为线程组服务的每个读取应用程序请求，核心接口生成一个未决请求表（PRT）条目和一个或多个内存访问请求。 核心接口基于应用程序请求中的存储器访问地址的扩展来确定存储器访问请求的数量和每个存储器访问请求的大小。 每个存储器访问请求指定存储器访问请求服务的特定线程。 PRT条目跟踪挂起的内存访问请求的数量。 当存储器接口完成每个存储器访问请求时，核心接口使用存储器访问请求中的信息和对应的PRT条目来路由返回的数据。 当与特定PRT条目相关联的所有存储器访问请求完成时，核心接口满足相应的应用请求并释放PRT条目。

公开(公告)号：US20130185728A1

公开(公告)日：2013-07-18

申请号：US13353150

申请日：2012-01-18

申请人： Karim M. Abdalla ,  Lacky V. Shah ,  Jerome F. Duluk, JR. ,  Timothy John Purcell ,  Tanmoy Mandal ,  Gentaro Hirota

发明人： Karim M. Abdalla ,  Lacky V. Shah ,  Jerome F. Duluk, JR. ,  Timothy John Purcell ,  Tanmoy Mandal ,  Gentaro Hirota

IPC分类号： G06F9/46

CPC分类号： G06F9/4881 ,  G06F9/4806 ,  G06F9/50 ,  G06F2209/483

摘要： One embodiment of the present invention sets forth a technique for assigning a compute task to a first processor included in a plurality of processors. The technique involves analyzing each compute task in a plurality of compute tasks to identify one or more compute tasks that are eligible for assignment to the first processor, where each compute task is listed in a first table and is associated with a priority value and an allocation order that indicates relative time at which the compute task was added to the first table. The technique further involves selecting a first task compute from the identified one or more compute tasks based on at least one of the priority value and the allocation order, and assigning the first compute task to the first processor for execution.

摘要翻译： 本发明的一个实施例提出了一种用于将计算任务分配给包括在多个处理器中的第一处理器的技术。 该技术涉及分析多个计算任务中的每个计算任务以识别符合分配给第一处理器的一个或多个计算任务，其中每个计算任务在第一表中列出并且与优先级值和分配 指示将计算任务添加到第一个表的相对时间的顺序。 该技术还包括基于优先级值和分配顺序中的至少一个从所识别的一个或多个计算任务中选择第一任务计算，以及将第一计算任务分配给第一处理器以供执行。

公开(公告)号：US20130185725A1

公开(公告)日：2013-07-18

申请号：US13353155

申请日：2012-01-18

申请人： Karim M. ABDALLA ,  Lacky V. Shah ,  Jerome F. Duluk, JR. ,  Timothy John Purcell ,  Tanmoy Mandal ,  Gentaro Hirota

发明人： Karim M. ABDALLA ,  Lacky V. Shah ,  Jerome F. Duluk, JR. ,  Timothy John Purcell ,  Tanmoy Mandal ,  Gentaro Hirota

IPC分类号： G06F9/46

CPC分类号： G06F9/505 ,  G06F2209/503

摘要： One embodiment of the present invention sets forth a technique for selecting a first processor included in a plurality of processors to receive work related to a compute task. The technique involves analyzing state data of each processor in the plurality of processors to identify one or more processors that have already been assigned one compute task and are eligible to receive work related to the one compute task, receiving, from each of the one or more processors identified as eligible, an availability value that indicates the capacity of the processor to receive new work, selecting a first processor to receive work related to the one compute task based on the availability values received from the one or more processors, and issuing, to the first processor via a cooperative thread array (CTA), the work related to the one compute task.

摘要翻译： 本发明的一个实施例提出了一种用于选择包括在多个处理器中的第一处理器以接收与计算任务相关的工作的技术。 该技术涉及分析多个处理器中的每个处理器的状态数据，以识别已经被分配了一个计算任务并且有资格接收与一个计算任务有关的工作的一个或多个处理器，从一个或多个处理器 被识别为合格的处理器，指示处理器接收新工作的容量的可用性值，基于从一个或多个处理器接收的可用性值，选择第一处理器以接收与一个计算任务相关的工作，并发布到 通过协作线程数组（CTA）的第一个处理器，与一个计算任务相关的工作。