公开(公告)号：US07333161B2

公开(公告)日：2008-02-19

申请号：US10961081

申请日：2004-10-12

申请人： Goe-Sung Chae ,  Jae-Kyun Lee ,  Yong-Sup Hwang

发明人： Goe-Sung Chae ,  Jae-Kyun Lee ,  Yong-Sup Hwang

IPC分类号： G02F1/136 ,  G02F1/1343

CPC分类号： G02F1/13458 ,  G02F1/1362 ,  G02F1/136213

摘要： An array substrate includes a substrate, a gate line disposed along a first direction on the substrate, and a common line is parallel to the gate line, the common line being of the same material as the gate line. A gate insulating layer is on the gate and common lines, a semiconductor layer is on the gate insulating layer and a transparent pixel electrode includes a drain electrode portion. The drain electrode portion overlaps the semiconductor. A passivation layer includes a first contact hole and an open portion over the pixel and source electrodes, the first contact hole exposing the source electrode and the open portion exposing the pixel electrode, respectively. A data line is disposed along a second direction on the passivation layer, and the data line connected to the source electrode through the first contact hole and crossing the gate line.

摘要翻译： 阵列基板包括基板，沿着基板上的第一方向设置的栅极线，并且公共线平行于栅极线，公共线与栅极线具有相同的材料。 栅绝缘层在栅极和公共线上，半导体层在栅极绝缘层上，透明像素电极包括漏电极部分。 漏极部分与半导体重叠。 钝化层包括第一接触孔和在像素和源极上的开口部分，第一接触孔分别暴露出源电极和暴露像素电极的开放部分。 数据线沿着第二方向设置在钝化层上，数据线通过第一接触孔与源极连接并与栅极线交叉。

公开(公告)号：US20080166829A1

公开(公告)日：2008-07-10

申请号：US12007212

申请日：2008-01-08

申请人： Goe-Sung Chae ,  Jae-Kyun Lee ,  Yong-Sup Hwang

发明人： Goe-Sung Chae ,  Jae-Kyun Lee ,  Yong-Sup Hwang

IPC分类号： H01L21/70

CPC分类号： G02F1/13458 ,  G02F1/1362 ,  G02F1/136213

摘要： According to an embodiment, a fabrication method includes forming a gate line disposed along a first direction and a common line parallel to the gate line on a substrate, the gate and common lines spaced apart from each other, forming a gate insulating layer on the gate and common lines, forming a semiconductor layer on the gate insulating layer, forming a source electrode and a pixel electrode of transparent conductive material, the pixel electrode including a drain electrode portion, the drain electrode portion overlapping the semiconductor layer, forming a passivation layer including a first contact hole and an open portion, the first contact hole exposing the source electrode and the open portion exposing the pixel electrode, respectively, and forming a data line disposed along a second direction on the passivation layer, the data line connected to the source electrode through the first contact hole and crossing the gate line.

摘要翻译： 根据实施例，制造方法包括：形成沿着第一方向设置的栅极线和与基板上的栅极线平行的公共线，栅极和公共线彼此间隔开，在栅极上形成栅极绝缘层 和公共线，在栅极绝缘层上形成半导体层，形成透明导电材料的源电极和像素电极，所述像素电极包括漏电极部分，所述漏电极部分与所述半导体层重叠，形成钝化层，所述钝化层包括 第一接触孔和开口部分，所述第一接触孔分别暴露所述源极电极和所述开放部分，暴露所述像素电极，并且形成沿所述钝化层沿着第二方向布置的数据线，所述数据线连接到所述源极 电极通过第一接触孔并与栅极线交叉。