公开(公告)号：US08166348B1

公开(公告)日：2012-04-24

申请号：US12748493

申请日：2010-03-29

Applicant: Gururaj Govind Kulkarni ,  Shelesh Chopra ,  Shivashankar Vasanad

Inventor： Gururaj Govind Kulkarni ,  Shelesh Chopra ,  Shivashankar Vasanad

IPC: G06F11/00

CPC classification number: G06F11/0793 ,  G06F11/3636 ,  G06F11/366

Abstract: A method, system, and a computer program product for debugging a software system. An aspect of the present invention provides a user with the combination of an error determined in the software system and a set of recommendations for fixing the error, thereby enabling the user to debug the software system more efficiently. In one embodiment, the error is determined by inspecting the execution states of the software system at different time instances prior to receiving a debug indication from the user. The set of recommendations for fixing the error is identified by searching a knowledge base that stores the recommendations (e.g., possible solutions, suggestions, and workarounds) for each of the errors.

Abstract translation: 一种用于调试软件系统的方法，系统和计算机程序产品。 本发明的一个方面为用户提供了在软件系统中确定的错误和用于修复错误的一组建议的组合，从而使得用户能够更有效地调试软件系统。 在一个实施例中，通过在从用户接收到调试指示之前在不同的时间实例检查软件系统的执行状态来确定错误。 通过搜索存储每个错误的建议的知识库（例如，可能的解决方案，建议和解决方法）来识别用于修复错误的一组建议。

公开(公告)号：US08516309B1

公开(公告)日：2013-08-20

申请号：US13363237

申请日：2012-01-31

Applicant: Gururaj Govind Kulkarni ,  Shelesh Chopra ,  Shivashankar Vasanad

Inventor： Gururaj Govind Kulkarni ,  Shelesh Chopra ,  Shivashankar Vasanad

IPC: G06F11/00

CPC classification number: G06F11/0793 ,  G06F11/3636 ,  G06F11/366

Abstract: A method, system, and a computer program product for debugging a software system. An aspect of the present invention provides a user with the combination of an error determined in the software system and a set of recommendations for fixing the error, thereby enabling the user to debug the software system more efficiently. In one embodiment, the error is determined by inspecting the execution states of the software system at different time instances prior to receiving a debug indication from the user. The set of recommendations for fixing the error is identified by searching a knowledge base that stores the recommendations (e.g., possible solutions, suggestions, and workarounds) for each of the errors.

Abstract translation: 一种用于调试软件系统的方法，系统和计算机程序产品。 本发明的一个方面为用户提供了在软件系统中确定的错误和用于修复错误的一组建议的组合，从而使得用户能够更有效地调试软件系统。 在一个实施例中，通过在从用户接收到调试指示之前在不同的时间实例检查软件系统的执行状态来确定错误。 通过搜索存储每个错误的建议的知识库（例如，可能的解决方案，建议和解决方法）来识别用于修复错误的一组建议。

公开(公告)号：US08149152B2

公开(公告)日：2012-04-03

申请号：US12729291

申请日：2010-03-23

Applicant: Venkatesh Teeka Srinivasa Shetty ,  Govind Kulkarni ,  Srinivasan Chakravarthy ,  Sumeet Mathur

Inventor： Venkatesh Teeka Srinivasa Shetty ,  Govind Kulkarni ,  Srinivasan Chakravarthy ,  Sumeet Mathur

IPC: H03M1/66

CPC classification number: H03M1/0612 ,  H01L27/0207 ,  H03M1/68 ,  H03M1/804

Abstract: A method and system for capacitor based digital to analog converter design layout for high speed analog to digital converter are provided. The method includes arranging a plurality of metal plates to form the capacitor. Each of the plurality of metal plates includes a driven plate and a common plate. The method also includes generating a plurality of interconnects in the common plate and extending the driven plate over the plurality of interconnects. Further, the method includes shielding the common plate by the driven plate. The system includes an analog to digital converter. The analog to digital converter also includes capacitor based digital to analog converter and digital logic for controlling digital operations in the analog to digital converter. The capacitor based digital to analog converter includes a plurality of capacitors, and a comparator for comparing the analog output from the digital to analog converter with a ground potential.

Abstract translation: 提供了一种用于高速模数转换器的基于电容器的数模转换器设计布局的方法和系统。 该方法包括布置多个金属板以形成电容器。 多个金属板中的每一个包括从动板和公共板。 该方法还包括在公共板中产生多个互连件并且在多个互连件上延伸从动板。 此外，该方法包括通过从动板屏蔽公共板。 该系统包括一个模数转换器。 模数转换器还包括基于电容的数模转换器和用于控制模数转换器中的数字操作的数字逻辑。 基于电容器的数模转换器包括多个电容器，以及用于将来自数模转换器的模拟输出与地电势进行比较的比较器。

公开(公告)号：US20100253563A1

公开(公告)日：2010-10-07

申请号：US12729291

申请日：2010-03-23

Applicant: Venkatesh Teeka Srinivasa SHETTY ,  Govind Kulkarni ,  Srinivasan Chakravarthy ,  Sumeet Mathur

Inventor： Venkatesh Teeka Srinivasa SHETTY ,  Govind Kulkarni ,  Srinivasan Chakravarthy ,  Sumeet Mathur

IPC: H03M1/66 ,  H05K9/00

CPC classification number: H03M1/0612 ,  H01L27/0207 ,  H03M1/68 ,  H03M1/804

Abstract: A method and system for capacitor based digital to analog converter design layout for high speed analog to digital converter are provided. The method includes arranging a plurality of metal plates to form the capacitor. Each of the plurality of metal plates includes a driven plate and a common plate. The method also includes generating a plurality of interconnects in the common plate and extending the driven plate over the plurality of interconnects. Further, the method includes shielding the common plate by the driven plate. The system includes an analog to digital converter. The analog to digital converter also includes capacitor based digital to analog converter and digital logic for controlling digital operations in the analog to digital converter. The capacitor based digital to analog converter includes a plurality of capacitors, and a comparator for comparing the analog output from the digital to analog converter with a ground potential.

Abstract translation: 提供了一种用于高速模数转换器的基于电容器的数模转换器设计布局的方法和系统。 该方法包括布置多个金属板以形成电容器。 多个金属板中的每一个包括从动板和公共板。 该方法还包括在公共板中产生多个互连件并且在多个互连件上延伸从动板。 此外，该方法包括通过从动板屏蔽公共板。 该系统包括一个模数转换器。 模数转换器还包括基于电容的数模转换器和用于控制模数转换器中的数字操作的数字逻辑。 基于电容器的数模转换器包括多个电容器，以及用于将来自数模转换器的模拟输出与地电势进行比较的比较器。