公开(公告)号：US6143594A

公开(公告)日：2000-11-07

申请号：US491604

申请日：2000-01-26

申请人： Alwin J. Tsao ,  Vikas I. Gupta ,  Gregory C. Baldwin ,  E. Ajith Amerasekera ,  David B. Spratt ,  Timothy A. Rost

发明人： Alwin J. Tsao ,  Vikas I. Gupta ,  Gregory C. Baldwin ,  E. Ajith Amerasekera ,  David B. Spratt ,  Timothy A. Rost

IPC分类号： H01L27/02 ,  H01L21/8238

CPC分类号： H01L27/0262 ,  H01L27/0266

摘要： In a split gate process for dual voltage chips, the N-type high-voltage transistors which are part of the ESD protection circuit, and therefore have the thicker gate oxide of the high-voltage transistors, can receive channel doping and drain extender doping which is the same as the core transistors. This causes these transistors to develop a high substrate current during an ESD event, triggering the protection circuit.

公开(公告)号：US20120102441A1

公开(公告)日：2012-04-26

申请号：US12909034

申请日：2010-10-21

申请人： Thomas J. Aton ,  Gregory C. Baldwin ,  Robert L. Pitts

发明人： Thomas J. Aton ,  Gregory C. Baldwin ,  Robert L. Pitts

IPC分类号： G06F17/50

CPC分类号： G03F1/68 ,  G03F1/36

摘要： A mask build system includes a program for configuring mask layers and a fabrication site for compiling configured mask layers. The system includes at least one database configured by a system processor, the database comprising drawn layers for fabricating reticles of a semiconductor device; and a marker layer configured to define layer dependent features, the marker layer handed off with that part of the at least one database which will support subsequent layers of the database without altering flow of mask build at the fabrication site.

摘要翻译： 掩模构建系统包括用于配置掩模层的程序和用于编译配置的掩模层的制造位置。 所述系统包括由系统处理器配置的至少一个数据库，所述数据库包括用于制造半导体器件的标线的绘制层; 以及标记层，其被配置为限定层相关特征，所述标记层与所述至少一个数据库的那部分切换，所述数据库将支持所述数据库的后续层，而不改变所述制造位置处的掩模构建的流程。

公开(公告)号：US6137144A

公开(公告)日：2000-10-24

申请号：US281189

申请日：1999-03-30

申请人： Alwin J. Tsao ,  Vikas I. Gupta ,  Gregory C. Baldwin ,  E. Ajith Amerasekera ,  David B. Spratt ,  Timothy A. Rost

发明人： Alwin J. Tsao ,  Vikas I. Gupta ,  Gregory C. Baldwin ,  E. Ajith Amerasekera ,  David B. Spratt ,  Timothy A. Rost

IPC分类号： H01L27/02 ,  H01L23/62

CPC分类号： H01L27/0262 ,  H01L27/0266

摘要： In a split gate process for dual voltage chips, the N-type high-voltage transistors which are part of the ESD protection circuit, and therefore have the thicker gate oxide of the high-voltage transistors, can receive channel doping and drain extender doping which is the same as the core transistors. This causes these transistors to develop a high substrate current during an ESD event, triggering the protection circuit.

摘要翻译： 在双电压芯片的分离栅极工艺中，作为ESD保护电路的一部分，因此具有较高栅极氧化物的高压晶体管的N型高压晶体管可以接收沟道掺杂和漏极延长器掺杂， 与芯晶体管相同。 这导致这些晶体管在ESD事件期间产生高衬底电流，从而触发保护电路。

公开(公告)号：US08595656B2

公开(公告)日：2013-11-26

申请号：US12909034

申请日：2010-10-21

申请人： Thomas J. Aton ,  Gregory C. Baldwin ,  Robert L. Pitts

发明人： Thomas J. Aton ,  Gregory C. Baldwin ,  Robert L. Pitts

IPC分类号： G06F17/50

CPC分类号： G03F1/68 ,  G03F1/36

摘要： A mask build system includes a program for configuring mask layers and a fabrication site for compiling configured mask layers. The system includes at least one database configured by a system processor, the database comprising drawn layers for fabricating reticles of a semiconductor device; and a marker layer configured to define layer dependent features, the marker layer handed off with that part of the at least one database which will support subsequent layers of the database without altering flow of mask build at the fabrication site.

摘要翻译： 掩模构建系统包括用于配置掩模层的程序和用于编译配置的掩模层的制造位置。 所述系统包括由系统处理器配置的至少一个数据库，所述数据库包括用于制造半导体器件的标线的绘制层; 以及标记层，其被配置为限定层相关特征，所述标记层与所述至少一个数据库的那部分切换，所述数据库将支持所述数据库的后续层，而不改变所述制造位置处的掩模构建的流程。