Integrated Circuit Device
    2.
    发明申请
    Integrated Circuit Device 审中-公开
    集成电路器件

    公开(公告)号:US20120139115A1

    公开(公告)日:2012-06-07

    申请号:US13305329

    申请日:2011-11-28

    IPC分类号: H01L27/06

    摘要: In an integrated circuit device and method of manufacturing the same, a conductive structure and a wiring structure are sequentially arranged on a substrate having a through hole. The conductive structure includes semiconductor chips and a contact structure. The wiring structure includes a metal line through which signals are transferred to the conductive structure. A penetration electrode is positioned in the through hole. The penetration electrode includes a conductive plug electrically connected to one of the conductive structure and the wiring structure, and a pair of a base layer and a gap interposed between the conductive plug and a sidewall of the through-hole, thereby enclosing the conductive plug. The base layer also includes a product of a solid reaction of reactants of which diffusion speeds are different. Accordingly, the dielectric characteristics of the penetration electrode are improved by using the gap as a dielectric gap.

    摘要翻译: 在集成电路器件及其制造方法中,导电结构和布线结构依次布置在具有通孔的基板上。 导电结构包括半导体芯片和接触结构。 布线结构包括金属线,信号通过该金属线传送到导电结构。 穿透电极位于通孔中。 穿透电极包括电连接到导电结构和布线结构中的一个的导电插塞,以及插入在导电插头和通孔的侧壁之间的一对基底层和间隙,从而封闭导电插塞。 基层还包括扩散速度不同的反应物的固体反应的产物。 因此,通过使用间隙作为电介质间隙,能够提高穿透电极的电介质特性。

    Multi-bit memory device using multi-plug
    3.
    发明授权
    Multi-bit memory device using multi-plug 有权
    多位存储设备使用多插头

    公开(公告)号:US07929330B2

    公开(公告)日:2011-04-19

    申请号:US12379894

    申请日:2009-03-04

    IPC分类号: G11C17/06

    CPC分类号: H01L27/101 G11C11/5692

    摘要: A memory device may include a cathode, an anode, a link connected to the anode, and a first connection element that connects the link to the cathode. The link and the anode may be located in a position lower than that of the cathode or the link and the anode may be located in a position higher than that of the cathode. Also, the cathode, the anode, the link, and the first connection element may be formed on the same plane.

    摘要翻译: 存储器件可以包括阴极,阳极,连接到阳极的连杆以及将连杆连接到阴极的第一连接元件。 连接件和阳极可以位于比阴极或连接件低的位置,并且阳极可以位于比阴极高的位置。 此外,阴极,阳极,连接件和第一连接元件也可以形成在同一平面上。