公开(公告)号：US06927105B2

公开(公告)日：2005-08-09

申请号：US10643963

申请日：2003-08-20

Applicant: Hae Jin Yun

Inventor： Hae Jin Yun

IPC: G02F1/1333 ,  G02F1/1362 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L21/00

CPC classification number: G02F1/13458 ,  H01L27/124

Abstract: A thin film transistor array substrate, and manufacturing methods thereof, having a dual data link structure comprised of a first data link made from a gate metal layer and of a second data link made from a transparent conductive layer. A gate pad made from the gate metal layer electrically connects directly with the first data link, and to the second data link via a data pad protection electrode that passes through contact holes. The data pad protection electrode makes surface connections to the data pad. A data line is electrically connected via a contact electrode to the first data link. The data line and the data pad are formed from different metal layers. The data pad is protected by a gate insulating layer. The contact electrode is extended from the second data link.

Abstract translation: 一种薄膜晶体管阵列基板及其制造方法，具有由栅极金属层制成的第一数据链和由透明导电层制成的第二数据链的双数据链路结构。 由栅极金属层制成的栅极焊盘与第一数据链路直接电连接，并通过经过接触孔的数据焊盘保护电极与第二数据链路电连接。 数据焊盘保护电极与数据焊盘进行表面连接。 数据线经由接触电极与第一数据链路电连接。 数据线和数据焊盘由不同的金属层形成。 数据焊盘由栅极绝缘层保护。 接触电极从第二数据链路延伸。

公开(公告)号：US06642580B1

公开(公告)日：2003-11-04

申请号：US10274879

申请日：2002-10-22

Applicant: Hae Jin Yun

Inventor： Hae Jin Yun

IPC: H01L2701

CPC classification number: G02F1/13458 ,  H01L27/124

Abstract: A thin film transistor array substrate, and manufacturing methods thereof, having a dual data link structure comprised of a first data link made from a gate metal layer and of a second data link made from a transparent conductive layer. A gate pad made from the gate metal layer electrically connects directly with the first data link, and to the second data link via a data pad protection electrode that passes through contact holes. The data pad protection electrode makes surface connections to the data pad. A data line is electrically connected via a contact electrode to the first data link. The data line and the data pad are formed from different metal layers. The data pad is protected by a gate insulating layer. The contact electrode is extended from the second data link.

Abstract translation: 一种薄膜晶体管阵列基板及其制造方法，具有由栅极金属层制成的第一数据链和由透明导电层制成的第二数据链路的双数据链路结构。 由栅极金属层制成的栅极焊盘与第一数据链路直接电连接，并通过经过接触孔的数据焊盘保护电极与第二数据链路电连接。 数据焊盘保护电极与数据焊盘进行表面连接。 数据线经由接触电极与第一数据链路电连接。 数据线和数据焊盘由不同的金属层形成。 数据焊盘由栅极绝缘层保护。 接触电极从第二数据链路延伸。

公开(公告)号：US07167217B2

公开(公告)日：2007-01-23

申请号：US10606808

申请日：2003-06-27

Applicant: Hae Jin Yun

Inventor： Hae Jin Yun

IPC: G02F1/36 ,  H01L29/04

CPC classification number: G02F1/136286 ,  G02F1/136227

Abstract: An LCD device includes an insulating substrate; a gate line disposed on the insulating substrate; a first data line disposed perpendicular to the gate line and separated from the gate line; a second data line disposed crossing the gate line on a same line as the first data line; a thin film transistor disposed substantially at a crossing point of the gate line and the second data line; an active layer disposed below the second data line, a source electrode, and a drain electrode of the thin film transistor; a third data line disposed perpendicular to the gate line to define a pixel region to electrically connect the first and second data lines with each other; and a pixel electrode disposal in the pixel region.

Abstract translation: LCD装置包括绝缘基板; 设置在绝缘基板上的栅极线; 垂直于栅极线设置并与栅极线分离的第一数据线; 第二数据线，其布置在与所述第一数据线相同的线上与所述栅极线交叉; 基本上设置在所述栅极线和所述第二数据线的交叉点处的薄膜晶体管; 设置在所述第二数据线下方的有源层，所述薄膜晶体管的源电极和漏电极; 垂直于所述栅极线设置的第三数据线，以限定将所述第一和第二数据线彼此电连接的像素区域; 以及像素区域中的像素电极处理。