公开(公告)号：US08969930B2

公开(公告)日：2015-03-03

申请号：US13321886

申请日：2011-04-06

申请人： Haizhoou Yin ,  Zhijiong Luo ,  Huilong Zhu

发明人： Haizhoou Yin ,  Zhijiong Luo ,  Huilong Zhu

IPC分类号： H01L29/78 ,  H01L21/28 ,  H01L29/66

CPC分类号： H01L21/28247 ,  H01L29/66545 ,  H01L29/78

摘要： A gate stack structure comprises an isolation dielectric layer formed on and embedded into a gate. A sidewall spacer covers opposite side faces of the isolation dielectric layer, and the isolation dielectric layer located on an active region is thicker than the isolation dielectric layer located on a connection region. A method for manufacturing the gate stack structure comprises removing part of the gate in thickness, the thickness of the removed part of the gate on the active region is greater than the thickness of the removed part of the gate on the connection region so as to expose opposite inner walls of the sidewall spacer; forming an isolation dielectric layer on the gate to cover the exposed inner walls. There is also provided a semiconductor device and a method for manufacturing the same. The methods can reduce the possibility of short-circuit occurring between the gate and the second contact hole and can be compatible with the dual-contact-hole process.

摘要翻译： 栅极堆叠结构包括形成在栅极上并嵌入栅极中的隔离电介质层。 侧壁间隔物覆盖隔离电介质层的相对侧面，并且位于有源区上的隔离电介质层比位于连接区上的隔离电介质层厚。 一种用于制造栅极堆叠结构的方法包括去除栅极的一部分厚度，有源区上的栅极的去除部分的厚度大于连接区域上的栅极的去除部分的厚度，以便露出 侧壁间隔件的相对的内壁; 在栅极上形成隔离电介质层以覆盖暴露的内壁。 还提供了一种半导体器件及其制造方法。 该方法可以降低栅极和第二接触孔之间发生短路的可能性，并且可以与双接触孔工艺兼容。

公开(公告)号：US20120061738A1

公开(公告)日：2012-03-15

申请号：US13321886

申请日：2011-04-06

申请人： Haizhoou Yin ,  Zhijiong Luo ,  Huilong Zhu

发明人： Haizhoou Yin ,  Zhijiong Luo ,  Huilong Zhu

IPC分类号： H01L29/78 ,  H01L21/28

CPC分类号： H01L21/28247 ,  H01L29/66545 ,  H01L29/78

摘要： A gate stack structure comprises an isolation dielectric layer formed on and embedded into a gate. A sidewall spacer covers opposite side faces of the isolation dielectric layer, and the isolation dielectric layer located on an active region is thicker than the isolation dielectric layer located on a connection region. A method for manufacturing the gate stack structure comprises removing part of the gate in thickness, the thickness of the removed part of the gate on the active region is greater than the thickness of the removed part of the gate on the connection region so as to expose opposite inner walls of the sidewall spacer; forming an isolation dielectric layer on the gate to cover the exposed inner walls. There is also provided a semiconductor device and a method for manufacturing the same. The methods can reduce the possibility of short-circuit occurring between the gate and the second contact hole and can be compatible with the dual-contact-hole process.

摘要翻译： 栅极堆叠结构包括形成在栅极上并嵌入栅极中的隔离电介质层。 侧壁间隔物覆盖隔离电介质层的相对侧面，并且位于有源区上的隔离电介质层比位于连接区上的隔离电介质层厚。 一种用于制造栅极堆叠结构的方法包括去除栅极的一部分厚度，有源区上的栅极的去除部分的厚度大于连接区域上的栅极的去除部分的厚度，以便露出 侧壁间隔件的相对的内壁; 在栅极上形成隔离电介质层以覆盖暴露的内壁。 还提供了一种半导体器件及其制造方法。 该方法可以降低栅极和第二接触孔之间发生短路的可能性，并且可以与双接触孔工艺兼容。