公开(公告)号：US20130136154A1

公开(公告)日：2013-05-30

申请号：US13481439

申请日：2012-05-25

申请人： Sunil Chomal ,  Karthik Ramasubramanian ,  Jawaharlal Tangudu ,  Hemanth Mullur

发明人： Sunil Chomal ,  Karthik Ramasubramanian ,  Jawaharlal Tangudu ,  Hemanth Mullur

IPC分类号： H04B1/713

CPC分类号： H04B1/709 ,  H04B1/7075 ,  H04B2201/70715

摘要： An integrated circuit for facilitating spread spectrum reception of data having a data bit period includes an hypothesis search circuit (120, 210, 220) operable to correlate a pseudorandom code with a signal input based on a received signal to produce correlation results, and a processor circuit (320) operable to coherently integrate the correlation results over plural sample windows (PreD1, PreD2) staggered relative to each other in the coherent integration interval and to non-coherently combine the coherently integrated results corresponding to the plural sample windows (PreD1, PreD2) to produce a received signal output, whereby enhancing performance. Other circuits, receivers and processes are also disclosed.

公开(公告)号：US08934522B2

公开(公告)日：2015-01-13

申请号：US13481439

申请日：2012-05-25

申请人： Sunil Chomal ,  Karthik Ramasubramanian ,  Jawaharlal Tangudu ,  Hemanth Mullur

发明人： Sunil Chomal ,  Karthik Ramasubramanian ,  Jawaharlal Tangudu ,  Hemanth Mullur

IPC分类号： H04B1/00

CPC分类号： H04B1/709 ,  H04B1/7075 ,  H04B2201/70715

摘要： An integrated circuit for facilitating spread spectrum reception of data having a data bit period includes an hypothesis search circuit (120, 210, 220) operable to correlate a pseudorandom code with a signal input based on a received signal to produce correlation results, and a processor circuit (320) operable to coherently integrate the correlation results over plural sample windows (PreD1, PreD2) staggered relative to each other in the coherent integration interval and to non-coherently combine the coherently integrated results corresponding to the plural sample windows (PreD1, PreD2) to produce a received signal output, whereby enhancing performance. Other circuits, receivers and processes are also disclosed.

摘要翻译： 一种用于促进具有数据位周期的数据的扩频接收的集成电路包括可操作以将伪随机码与基于接收信号输入的信号相关联以产生相关结果的假设检索电路（120,210,220），以及处理器 电路（320）可操作以将相关结果相干地整合在相干积分间隔中相对于彼此交错的多个样本窗口（PreD1，PreD2），并且非相干地组合对应于多个样本窗口的相干整合结果（PreD1，PreD2 ）以产生接收信号输出，从而提高性能。 还公开了其他电路，接收器和处理。