公开(公告)号：US06631144B1

公开(公告)日：2003-10-07

申请号：US09468606

申请日：1999-12-21

申请人： Henrik Ingvar Johansen

发明人： Henrik Ingvar Johansen

IPC分类号： H04J306

CPC分类号： H03L7/087 ,  H03L7/07 ,  H03L7/095 ,  H03L7/18 ,  H04J3/0632 ,  H04J2203/0089 ,  H04L7/033

摘要： A multi-rate transponder system has a receiving part, a system controller and a transmitting part. The receiving part includes a data transfer circuit, a clock transfer circuit, and a reference clock circuit. The receiving part receives the incoming serial data stream and derives a clock signal and a data signal. The data transfer circuit generates an incoming data signal based on the derived data signal. The clock transfer circuit generates a receiver clock signal. The reference clock circuit generates a reference clock signal for the transmitting part based on the derived clock signal. The system controller includes system data receiving and transferring means, and system data processing means. The system data receiving means receives the incoming data signal and the receiver clock signal and provides the incoming data signal for clock domain transfer. The system data processing means processes the incoming data signal to generate an outgoing data signal to the system data transfer means. The system data transfer means provides the outgoing data signal to the transmitting part in response to a transmitter clock signal. The transmitting part generates an output clock signal based on the reference clock signal, and includes a transmitter clock circuit to generate the transmitter clock signal to the system data transfer means, a data reception circuit to receive the outgoing data signal from the system data transfer means and to generate the serial outgoing data stream at an appropriate bit rate depending on the outgoing data signal and the output clock signal.

摘要翻译： 多速率转发器系统具有接收部分，系统控制器和发送部分。 接收部分包括数据传送电路，时钟传送电路和参考时钟电路。 接收部分接收输入的串行数据流并导出时钟信号和数据信号。 数据传输电路基于导出的数据信号产生输入数据信号。 时钟传输电路产生接收机时钟信号。 参考时钟电路基于导出的时钟信号产生用于发送部分的参考时钟信号。 系统控制器包括系统数据接收和传送装置和系统数据处理装置。 系统数据接收装置接收输入数据信号和接收机时钟信号，并提供用于时钟域传送的输入数据信号。 系统数据处理装置处理输入数据信号以产生到系统数据传送装置的输出数据信号。 系统数据传送装置响应于发射机时钟信号向发射部分提供输出数据信号。 发送部分基于参考时钟信号产生输出时钟信号，并且包括发送时钟电路，用于向系统数据传送装置产生发送器时钟信号;数据接收电路，用于从系统数据传送装置接收输出数据信号 并且根据输出数据信号和输出时钟信号以适当的比特率产生串行输出数据流。

公开(公告)号：US06438178B1

公开(公告)日：2002-08-20

申请号：US09373080

申请日：1999-08-11

申请人： Henning Lysdal ,  Michael Liere ,  Henrik Ingvar Johansen

发明人： Henning Lysdal ,  Michael Liere ,  Henrik Ingvar Johansen

IPC分类号： H04L2506

CPC分类号： H04L25/06 ,  H04L25/03885 ,  H04L25/4912

摘要： An integrated circuit for receiving and recovering an incoming electrical signal of a digital data bit stream transmitted over a communication channel, and comprising an equaliser circuit adapted to reshape the electrical signal to be provided to, a CDR circuit adapted to receive the reshaped electrical signal and to recover data bit signal of the digital bit stream and to recover a clock signal encoded or embedded in the digital data stream.

摘要翻译： 一种用于接收和恢复通过通信信道发送的数字数据比特流的输入电信号的集成电路，并且包括适于重新形成要提供给适于接收重整电信号的CDR电路的电信号的均衡器电路， 以恢复数字位流的数据位信号，并恢复编码或嵌入在数字数据流中的时钟信号。