摘要:
Pulse width modulation quasi-resonant voltage inverter including a bridge (2) and an oscillating circuit consisting of an inductance (5) in series with the voltage source (1) and of a capacitor (6) in parallel with the bridge (2), the sampling period was much greater than the resonance period, characterized in that it includes a controlled component operating in blocked/saturated mode (7) in parallel with the capacitor (6) and a voltage sensor (8) parallel with the capacitor (6), the component (7) being controlled by the sensor (8) so as to short-circuit the capacitor (6) when the voltage across the latter's terminals is zero and to enable the transitions of the signal for control of the pulse width modulation regulation.
摘要:
A power converter comprises two main switches connecting an output either to the positive rail or to the negative rail. Two freewheel diodes for maintaining the current in the load, two snubbers and an auxiliary circuit including an auxiliary inductor in series with two auxiliary switches connected between the output and a mid-point of a capacitive voltage divider supplying a median voltage. Any error of the median voltage relative to its nominal value is evaluated and the main switches are additionally commanded, depending on the direction of the error, for a time period dependent on the amplitude of the error, in order to cause an additional current in the auxiliary circuit to correct the error at least in part.
摘要:
Method of regulating a voltage inverter operating in quasi-resonance, including an inverter bridge with controlled components (transistors, GTO etc.) operating in turned off-saturated mode, and an oscillating circuit arranged on the DC voltage source side, and consisting of an inductor in series with the DC voltage source, and of a capacitor connected in parallel with the inverter bridge, characterized in that pulse-width modulation regulation is carried out, in which the sampling period is very much greater than and of the order of about ten or more times the resonance period of the oscillating circuit.
摘要:
The invention relates to static electric power conversion using semiconductors using soft switching in zero-voltage mode and controlled to perform pulse width modulation, having a first interface (L, C, T.sub.a, D.sub.a) in series between a DC voltage input (E) and a converter (1), and with a second interface (2) connected to the connection between the first interface and the converter (1) and organized, immediately before the end of a voltage window of amplitude (1+k)E to cause a positive current to flow through the switch (T.sub.a,D.sub.d) to counter the input current of the converter (1) which is negative when the ripple current flowing through the inductor is at its minimum value so as to reduce the current ripple amplitude required for switching off the switch (T.sub.a, D.sub.a), thereby reducing the current ripple for controlling interruption of the short circuit provided by the branch(es) of the converter (1).