公开(公告)号：US07078817B2

公开(公告)日：2006-07-18

申请号：US11010596

申请日：2004-12-13

申请人： Paul S. Ho ,  Ki-Don Lee ,  Ennis Ogawa ,  Hideki Matsuhashi

发明人： Paul S. Ho ,  Ki-Don Lee ,  Ennis Ogawa ,  Hideki Matsuhashi

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L22/34 ,  H01L23/522 ,  H01L23/5226 ,  H01L23/53228 ,  H01L2924/0002 ,  H01L2924/00

摘要： Electromigration can be reduced in a copper-based metallization of an integrated circuit that includes a first copper-containing via that electrically connects an underlying conductive line and an overlying copper-containing line through an intervening insulating layer. Electromigration can be reduced by forming at least a second copper-containing via that electrically connects the underlying conductive line and the overlying copper-containing line through the intervening insulating layer, in parallel with the first copper-containing via. Multi-vias can provide redundancy to reduce early failure statistics. Moreover, since current is distributed among the vias, the electromigration driving force can be reduced and local Joule heating, in voids at the via interface, also may be reduced. Accordingly, even if via voids are formed, the structure may not fail by catastrophic thermal runaway due to Joule heating.

摘要翻译： 可以减少集成电路的铜基金属化中的电迁移，该集成电路包括通过中间绝缘层将下面的导电线与覆盖的含铜线电连接的第一含铜通孔。 通过形成至少第二含铜通孔，通过与第一含铜通孔平行地电连接下面的导电线路和覆盖的含铜线路穿过中间绝缘层，可以减少电迁移。 多通道可以提供冗余以减少早期故障统计。 此外，由于电流分布在通孔中，所以可以减少电迁移驱动力，并且可以减少在通孔接口处的空隙中的局部焦耳加热。 因此，即使形成通孔，由于焦耳加热，结构也可能不会由于灾难性热失控而失效。

公开(公告)号：US06495461B2

公开(公告)日：2002-12-17

申请号：US09955039

申请日：2001-09-19

申请人： Kazuo Tsubouchi ,  Kazuya Masu ,  Hideki Matsuhashi

发明人： Kazuo Tsubouchi ,  Kazuya Masu ,  Hideki Matsuhashi

IPC分类号： H01L2144

CPC分类号： H01L21/76856 ,  H01L21/76841 ,  H01L21/76843 ,  H01L21/76855 ,  H01L23/485 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device comprising a substrate, a conductor and an insulating film provided on the surface of the substrate, part of the surface of the substrate being electrically connected with the conductor through a contact hole made in the insulating film, wherein a barrier layer present between part of the surface of the substrate and the conductor is provided only on the bottom of the contact hole, and the barrier layer provided on the bottom comprises amorphous titanium silicon nitride. This can provide a structure that has a barrier layer with a low contact resistance, enables formation of a conductor film of good quality on the barrier layer, and can attain a good electrical conduction even at fine contact holes.

摘要翻译： 一种半导体器件，包括设置在所述衬底的表面上的衬底，导体和绝缘膜，所述衬底的表面的一部分通过在所述绝缘膜中形成的接触孔与所述导体电连接，其中， 基板的表面的一部分和导体仅设置在接触孔的底部，并且设置在底部的阻挡层包括无定形氮化钛。这可以提供具有低接触电阻的阻挡层的结构 能够在阻挡层上形成质量好的导体膜，即使在微细的接触孔也能够获得良好的导电性。

公开(公告)号：US06919639B2

公开(公告)日：2005-07-19

申请号：US10271284

申请日：2002-10-15

申请人： Paul S. Ho ,  Ki-Don Lee ,  Ennis Ogawa ,  Hideki Matsuhashi

发明人： Paul S. Ho ,  Ki-Don Lee ,  Ennis Ogawa ,  Hideki Matsuhashi

IPC分类号： H01L23/522 ,  H01L23/532 ,  H01L23/544 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L22/34 ,  H01L23/522 ,  H01L23/5226 ,  H01L23/53228 ,  H01L2924/0002 ,  H01L2924/00

摘要： Electromigration can be reduced in a copper-based metallization of an integrated circuit that includes a first copper-containing via that electrically connects an underlying conductive line and an overlying copper-containing line through an intervening insulating layer. Electromigration can be reduced by forming at least a second copper-containing via that electrically connects the underlying conductive line and the overlying copper-containing line through the intervening insulating layer, in parallel with the first copper-containing via. Multi-vias can provide redundancy to reduce early failure statistics. Moreover, since current is distributed among the vias, the electromigration driving force can be reduced and local Joule heating, in voids at the via interface, also may be reduced. Accordingly, even if via voids are formed, the structure may not fail by catastrophic thermal runaway due to Joule heating.

摘要翻译： 可以减少集成电路的铜基金属化中的电迁移，该集成电路包括通过中间绝缘层将下面的导电线与覆盖的含铜线电连接的第一含铜通孔。 通过形成至少第二含铜通孔，通过与第一含铜通孔平行地电连接下面的导电线路和覆盖的含铜线路穿过中间绝缘层，可以减少电迁移。 多通道可以提供冗余以减少早期故障统计。 此外，由于电流分布在通孔中，所以可以减少电迁移驱动力，并且可以减少在通孔接口处的空隙中的局部焦耳加热。 因此，即使形成通孔，由于焦耳加热，结构也可能不会由于灾难性热失控而失效。

公开(公告)号：US20050093163A1

公开(公告)日：2005-05-05

申请号：US11010596

申请日：2004-12-13

申请人： Paul Ho ,  Ki-Don Lee ,  Ennis Ogawa ,  Hideki Matsuhashi

发明人： Paul Ho ,  Ki-Don Lee ,  Ennis Ogawa ,  Hideki Matsuhashi

IPC分类号： H01L23/522 ,  H01L23/532 ,  H01L23/544 ,  H01L21/44 ,  H01L23/48 ,  H01L23/52

CPC分类号： H01L22/34 ,  H01L23/522 ,  H01L23/5226 ,  H01L23/53228 ,  H01L2924/0002 ,  H01L2924/00

摘要： Electromigration can be reduced in a copper-based metallization of an integrated circuit that includes a first copper-containing via that electrically connects an underlying conductive line and an overlying copper-containing line through an intervening insulating layer. Electromigration can be reduced by forming at least a second copper-containing via that electrically connects the underlying conductive line and the overlying copper-containing line through the intervening insulating layer, in parallel with the first copper-containing via. Multi-vias can provide redundancy to reduce early failure statistics. Moreover, since current is distributed among the vias, the electromigration driving force can be reduced and local Joule heating, in voids at the via interface, also may be reduced. Accordingly, even if via voids are formed, the structure may not fail by catastrophic thermal runaway due to Joule heating.

摘要翻译： 可以减少集成电路的铜基金属化中的电迁移，该集成电路包括通过中间绝缘层将下面的导电线与覆盖的含铜线电连接的第一含铜通孔。 通过形成至少第二含铜通孔，通过与第一含铜通孔平行地电连接下面的导电线路和覆盖的含铜线路穿过中间绝缘层，可以减少电迁移。 多通道可以提供冗余以减少早期故障统计。 此外，由于电流分布在通孔中，所以可以减少电迁移驱动力，并且可以减少在通孔接口处的空隙中的局部焦耳加热。 因此，即使形成通孔，由于焦耳加热，结构也可能不会由于灾难性热失控而失效。