公开(公告)号：US6034552A

公开(公告)日：2000-03-07

申请号：US70529

申请日：1998-04-30

申请人： Hun-Hsin Chang ,  Ming-Dou Ker ,  Kuo-Tsai Lee ,  Wen-Hsiang Huang

发明人： Hun-Hsin Chang ,  Ming-Dou Ker ,  Kuo-Tsai Lee ,  Wen-Hsiang Huang

IPC分类号： H01L27/02 ,  H03K19/0175 ,  H02H3/22 ,  H02H9/00 ,  H03K19/094

CPC分类号： H01L27/0251

摘要： A dynamic-floating-gate arrangement is used to improve the ESD robustness of driving-current-programmable CMOS output buffers in cell libraries, by suitably dynamically floating the gates of the NMOS/PMOS buffers using a small-dimension CMOS device having its drain connected to the gate of an unused CMOS buffer, its source connected to one of two voltage sources, and its gate connected between a resistance, that is connected between the two voltage sources, and a capacitance connected between the resistance and the same one of the two voltage sources as the source of the small-dimension CMOS device.

摘要翻译： 动态浮栅布置用于通过使用其漏极连接的小尺寸CMOS器件适当地动态地浮动NMOS / PMOS缓冲器的栅极来提高单元库中的驱动电流可编程CMOS输出缓冲器的ESD鲁棒性 到未使用的CMOS缓冲器的栅极，其源极连接到两个电压源中的一个，并且其栅极连接在连接在两个电压源之间的电阻之间，以及连接在电阻和两个电压之间的电容之间的电容 电压源作为小尺寸CMOS器件的源头。