公开(公告)号：US20060262045A1

公开(公告)日：2006-11-23

申请号：US11337559

申请日：2006-01-24

申请人： Hye-Kwang Park

发明人： Hye-Kwang Park

IPC分类号： G09G3/28

CPC分类号： G09G3/2965 ,  G09G3/293 ,  G09G3/294 ,  G09G3/296 ,  G09G2330/12

摘要： A plasma display includes: a plurality of electrodes extending in one direction; at least one inductor coupled between the plurality of electrodes and a power recovery power source; a first transistor coupled either between the at least one inductor and the electrode or between the at least one inductor and the power recovery power source; a second transistor coupled either between the at least one inductor and the electrode or between the at least one inductor and the power recovery power source; and a gate driving circuit adapted to supply either a high or low level voltage to a gate of either the first or second transistor, and including a Light Emitting Diode (LED) adapted to emit light in response to a current flow to the gate, and a first diode coupled to the LED in reverse parallel.

摘要翻译： 等离子体显示器包括：沿一个方向延伸的多个电极; 耦合在所述多个电极和功率恢复电源之间的至少一个电感器; 耦合在所述至少一个电感器和所述电极之间或耦合在所述至少一个电感器和所述功率恢复电源之间的第一晶体管; 耦合在所述至少一个电感器和所述电极之间或耦合在所述至少一个电感器和所述功率恢复电源之间的第二晶体管; 以及门驱动电路，其适于向第一或第二晶体管的栅极提供高电平或低电平电压，并且包括适于响应于到达门的电流发射光的发光二极管（LED），以及 第一二极管反向并联耦合到LED。

公开(公告)号：US08542180B2

公开(公告)日：2013-09-24

申请号：US13217037

申请日：2011-08-24

申请人： Hye-Kwang Park ,  Sang-Heon Park ,  Seung-Hwan Moon

发明人： Hye-Kwang Park ,  Sang-Heon Park ,  Seung-Hwan Moon

IPC分类号： G09G3/36

CPC分类号： G09G3/3696 ,  G09G3/3648 ,  G09G2310/067 ,  G09G2330/027

摘要： A method of driving a display panel includes generating a gate on voltage, a first gate off voltage and a second gate off voltage. A clock signal is generated based upon the gate on voltage and the second gate off voltage. A first panel gate off voltage substantially the same as the first gate off voltage and a second panel gate off voltage substantially the same as the second gate off voltage are generated in a first operating mode. A first panel gate off voltage greater than the first gate off voltage and a second panel gate off voltage greater than the second gate off voltage are generated in a second operating mode. A gate signal is generated based upon the clock signal and the first and second panel gate off voltages to a gate line of the display panel.

摘要翻译： 驱动显示面板的方法包括产生栅极导通电压，第一栅极截止电压和第二栅极截止电压。 基于栅极导通电压和第二栅极截止电压产生时钟信号。 在第一操作模式中产生与第一栅极截止电压基本相同的第一面板栅极截止电压和基本上与第二栅极截止电压基本相同的第二面板栅极截止电压。 在第二操作模式中产生大于第一栅极截止电压的第一面板栅极截止电压和大于第二栅极截止电压的第二面板栅极截止电压。 基于时钟信号和对显示面板的栅极线的第一和第二面板栅极截止电压产生栅极信号。

公开(公告)号：US20120139436A1

公开(公告)日：2012-06-07

申请号：US13217037

申请日：2011-08-24

申请人： Hye-Kwang PARK ,  Sang-Heon PARK ,  Seung-Hwan MOON

发明人： Hye-Kwang PARK ,  Sang-Heon PARK ,  Seung-Hwan MOON

IPC分类号： H05B37/02

CPC分类号： G09G3/3696 ,  G09G3/3648 ,  G09G2310/067 ,  G09G2330/027

摘要： A method of driving a display panel includes generating a gate on voltage, a first gate off voltage and a second gate off voltage. A clock signal is generated based upon the gate on voltage and the second gate off voltage. A first panel gate off voltage substantially the same as the first gate off voltage and a second panel gate off voltage substantially the same as the second gate off voltage are generated in a first operating mode. A first panel gate off voltage greater than the first gate off voltage and a second panel gate off voltage greater than the second gate off voltage are generated in a second operating mode. A gate signal is generated based upon the clock signal and the first and second panel gate off voltages to a gate line of the display panel.

摘要翻译： 驱动显示面板的方法包括产生栅极导通电压，第一栅极截止电压和第二栅极截止电压。 基于栅极导通电压和第二栅极截止电压产生时钟信号。 在第一操作模式中产生与第一栅极截止电压基本相同的第一面板栅极截止电压和基本上与第二栅极截止电压基本相同的第二面板栅极截止电压。 在第二操作模式中产生大于第一栅极截止电压的第一面板栅极截止电压和大于第二栅极截止电压的第二面板栅极截止电压。 基于时钟信号和对显示面板的栅极线的第一和第二面板栅极截止电压产生栅极信号。