公开(公告)号：US06950975B2

公开(公告)日：2005-09-27

申请号：US10211893

申请日：2002-08-02

申请人： Hykong Chang ,  Seok Ho Kim

发明人： Hykong Chang ,  Seok Ho Kim

IPC分类号： H03M13/29 ,  H03N13/00

CPC分类号： H03M13/3905 ,  H03M13/09 ,  H03M13/2957 ,  H03M13/2975 ,  H03M13/3994

摘要： System and method for accelerating the convergence rate of turbo decoding by verifying bits in data frames whose CRC shows no bit errors. Verified bits are translated to bound nodes on a trellis of nodes representing a sequence of bits of the encoded code block. Verification of all bits signals a stop condition and decoding iterations can be terminated. Further, state transition metrics are limited when a node is adjacent to a bound node, allowing for acceleration of convergence by elimination of impossible state transitions. Also disclosed is a scheme to detect bit errors when the code block contains unframed data or partial data frames. This bit error detection scheme uses a recursive encoder to establish end node status. The end node state determination accelerates convergence rate recognition when incorporated with other stop conditions.

摘要翻译： 通过验证CRC显示没有位错误的数据帧中的比特来加速turbo解码收敛速度的系统和方法。 被验证的比特被转换成表示编码代码块的比特序列的节点的节点上的绑定节点。 可以终止对所有比特信号的验证，停止条件和解码迭代。 此外，当节点与绑定节点相邻时，状态转换度量受到限制，从而通过消除不可能的状态转换来允许加速收敛。 还公开了当代码块包含非成帧数据或部分数据帧时检测位错误的方案。 该位错误检测方案使用递归编码器来建立端节点状态。 当结合其他停止条件时，端节点状态确定加速了收敛速率识别。