公开(公告)号：US20120216091A1

公开(公告)日：2012-08-23

申请号：US13238382

申请日：2011-09-21

申请人： Kevin Joseph Blostic ,  James Jacob Riling ,  Adam Edward Szymkowiak ,  Todd Anthony DeLong ,  Joseph William Reutzel ,  Anthony Pietro Mancini, II

发明人： Kevin Joseph Blostic ,  James Jacob Riling ,  Adam Edward Szymkowiak ,  Todd Anthony DeLong ,  Joseph William Reutzel ,  Anthony Pietro Mancini, II

IPC分类号： G06F11/00

CPC分类号： G06F17/5022 ,  G01R31/318364 ,  G06F11/261 ,  G06F2217/14

摘要： A method of testing a target electronic device implemented in a configurable integrated circuit device includes receiving a baseline design for the target electronic device in a hardware description language, establishing a fault model for the particular configurable integrated circuit device, synthesizing the fault model in the hardware description language, embedding the synthesized fault model into the baseline design to create a modified baseline design in the hardware description language which enables one or more targeted signals to be selectively corrupted, creating a fault model enabled target device on the particular configurable integrated circuit device using the modified baseline design, performing a number of fault injection experiments on the fault model enabled target device, wherein each fault injection experiment includes causing at least one of the one or more targeted signals to be corrupted within the fault model enabled target device.

摘要翻译： 测试在可配置集成电路设备中实现的目标电子设备的方法包括以硬件描述语言接收目标电子设备的基线设计，为特定可配置集成电路设备建立故障模型，在硬件中合成故障模型 描述语言，将合成的故障模型嵌入到基准设计中以在硬件描述语言中创建修改的基线设计，其使得能够选择性地损坏一个或多个目标信号，在特定的可配置集成电路设备上使用启用故障模型的目标设备，使用 修改的基线设计，对故障模型启用的目标设备执行多个故障注入实验，其中每个故障注入实验包括使得所述一个或多个目标信号中的至少一个在所述故障模型启用的目标设备内被破坏。

公开(公告)号：US08418012B2

公开(公告)日：2013-04-09

申请号：US13238382

申请日：2011-09-21

申请人： Kevin Joseph Blostic ,  James Jacob Riling ,  Adam Edward Szymkowiak ,  Todd Anthony DeLong ,  Joseph William Reutzel ,  Anthony Pietro Mancini, II

发明人： Kevin Joseph Blostic ,  James Jacob Riling ,  Adam Edward Szymkowiak ,  Todd Anthony DeLong ,  Joseph William Reutzel ,  Anthony Pietro Mancini, II

IPC分类号： G06F11/00

CPC分类号： G06F17/5022 ,  G01R31/318364 ,  G06F11/261 ,  G06F2217/14

摘要： A method of testing a target electronic device implemented in a configurable integrated circuit device includes receiving a baseline design for the target electronic device in a hardware description language, establishing a fault model for the particular configurable integrated circuit device, synthesizing the fault model in the hardware description language, embedding the synthesized fault model into the baseline design to create a modified baseline design in the hardware description language which enables one or more targeted signals to be selectively corrupted, creating a fault model enabled target device on the particular configurable integrated circuit device using the modified baseline design, performing a number of fault injection experiments on the fault model enabled target device, wherein each fault injection experiment includes causing at least one of the one or more targeted signals to be corrupted within the fault model enabled target device.

摘要翻译： 测试在可配置集成电路设备中实现的目标电子设备的方法包括以硬件描述语言接收目标电子设备的基线设计，为特定可配置集成电路设备建立故障模型，在硬件中合成故障模型 描述语言，将合成的故障模型嵌入到基准设计中以在硬件描述语言中创建修改的基线设计，其使得能够选择性地损坏一个或多个目标信号，在特定的可配置集成电路设备上使用启用故障模型的目标设备，使用 修改的基线设计，对故障模型启用的目标设备执行多个故障注入实验，其中每个故障注入实验包括使得所述一个或多个目标信号中的至少一个在所述故障模型启用的目标设备内被破坏。

公开(公告)号：US5916289A

公开(公告)日：1999-06-29

申请号：US797069

申请日：1997-02-10

申请人： Salem Ahmad Fayyad ,  Sheri Lynn Patterson ,  Troy Allen Wideman ,  James Jacob Riling

发明人： Salem Ahmad Fayyad ,  Sheri Lynn Patterson ,  Troy Allen Wideman ,  James Jacob Riling

IPC分类号： B60R21/00 ,  B60R21/01 ,  B60R21/0132 ,  B60R21/0136 ,  B60R21/32

CPC分类号： B60R21/0132 ,  B60R21/013 ,  B60R2021/0004 ,  B60R2021/0006 ,  B60R2021/01034 ,  B60R21/0136

摘要： A SIR system has frontal air bags and side air bags both controlled by the same microprocessor. To guard against spurious deployment of side air bags with minimal software burden, a lateral accelerometer and an arming circuit detect side crash activity and apply an arming signal to a pulse accumulator circuit in the microprocessor which monitors the accumulator state to detect arming, thereby inhibiting deployment when the arming signal is absent. The arming circuit receives the accelerometer signal, removes the dc component which is subject to drift, adds a fixed offset voltage and compares the resultant signal to threshold values to produce an arming signal when a threshold is breached.

摘要翻译： SIR系统具有正面安全气囊和侧面安全气囊，均由相同的微处理器控制。 为了防止软件负担最小的侧面安全气囊的虚假部署，侧向加速度计和布防电路检测侧面碰撞活动，并向微处理器中的脉冲累加器电路施加布防信号，微处理器监视蓄电池状态以检测布防，从而阻止部署 当布防信号不存在时。 布防电路接收加速度计信号，去除经受漂移的直流分量，增加固定偏移电压，并将结果信号与阈值进行比较，以在违反阈值时产生布防信号。