Electrically-programmable semiconductor memories with buried injector
region
    1.
    发明授权
    Electrically-programmable semiconductor memories with buried injector region 失效
    具有埋入式注射器区域的电可编程半导体存储器

    公开(公告)号:US5216269A

    公开(公告)日:1993-06-01

    申请号:US745992

    申请日:1991-08-08

    IPC分类号: H01L29/788

    CPC分类号: H01L29/7884

    摘要: Each memory cell of an electrically-programmable semiconductor memory has a field-effect transistor with a charge-storage region. Efficient and fast injection of hot carriers into the charge-storage region is achieved by vertical punch-through of a depletion layer to a buried injector region, by application of programming voltages to a control gate and to the surface of the punch-through region. Non-injected carriers are removed via at least the transistor drain during the programming. A well-defined punch-through region can be obtained with a higher-doped boundary region at at least one side of the punch-through region to restrict the lateral spread of the depletion layer(s) and prevent parasitic connections. This permits closer spacing of the injector region to other regions of the memory cell, e.g. source and drain regions, and the injector region may adjoin an inset insulating field pattern. A compact cell array layout can be formed with a common connection region for the injector regions of two adjacent cells and for either a source or drain region of four other adjacent cells. The control gate and an erase gate may both be coupled in the same manner to the charge-storage region, and the cell can be operated with complementary voltage levels for writing and erasing. A feed-back mechanism with the start of injection from the punch-through and injector regions can provide a well-defined charge level limit for the erasure.

    摘要翻译: 电可编程半导体存储器的每个存储单元具有具有电荷存储区域的场效应晶体管。 通过将编程电压施加到控制栅极和穿通区域的表面,通过将耗尽层垂直穿透到埋入式注入器区域来实现热载流子进入电荷存储区域的高效和快速注入。 在编程期间,非注入载流子至少通过晶体管漏极去除。 可以在穿通区域的至少一侧具有较高掺杂的边界区域来获得明确的穿通区域,以限制耗尽层的横向扩展并防止寄生连接。 这允许注射器区域与存储器单元的其它区域的更近的间隔,例如, 源极和漏极区域,并且注入器区域可以邻接插入绝缘场图案。 紧凑的单元阵列布局可以形成有用于两个相邻单元的注入器区域和四个其它相邻单元的源极或漏极区域的公共连接区域。 控制栅极和擦除栅极都可以以相同的方式耦合到电荷存储区域,并且可以以互补的电压电平对单元进行操作以进行写入和擦除。 具有从穿通和注射器区域的注入开始的反馈机构可以为擦除提供明确定义的电荷水平限制。

    EPROM having a reduced number of contacts
    2.
    发明授权
    EPROM having a reduced number of contacts 失效
    EPROM具有减少的触点数量

    公开(公告)号:US5017978A

    公开(公告)日:1991-05-21

    申请号:US497953

    申请日:1990-03-22

    摘要: An integrated circuit includes a memory having cells arranged in rows and columns, each cell having transistor being connected between two bit lines and having a current channel, a control gate and a charge-storage region therebetween, neighboring cells in a same row having a bit line contact in common, and control gates of transistors in a row being connected to a same word line, wherein each transistor has in a substrate of a first conductivity type a source region, a drain region and an injector region of a second conductivity type and mutually separated from each other, the injector regions of the transistors in a first row being controllable via the bit line contacts of the transistors in a second row adjacent to said first row. Preferably, at least one source region, at least one drain region and at least one injector region that are connected to a same bit line contact form a coherent region, e.g. a well, in the substrate. Preferably, the first and second row have the word line in common. The multiple use of bit line and word lines contribute to a dense memory.