公开(公告)号：US20050131980A1

公开(公告)日：2005-06-16

申请号：US10956314

申请日：2004-10-01

申请人： Lionel Torres ,  Gaston Cambon ,  Michel Robert ,  Gilles Sassatelli ,  Jerome Galy

发明人： Lionel Torres ,  Gaston Cambon ,  Michel Robert ,  Gilles Sassatelli ,  Jerome Galy

IPC分类号： G06F15/00 ,  G06F15/78

CPC分类号： G06F15/7867

摘要： A logical calculation architecture including a multiplicity of configurable calculation components; a multiplicity of interconnection components; a first set of signals that configure the architecture by connecting between the calculation components and the interconnection components; a processor that generates the first set of configuration signals; a multiplicity of configurable control components, each control component connected to one of the calculation components and the control components generating at least one calculation instruction for calculation components; and a second set of signals that configure the control components.

摘要翻译： 包括多个可配置计算组件的逻辑计算架构; 多个互连组件; 通过连接计算组件和互连组件来配置架构的第一组信号; 处理器，其生成第一组配置信号; 多个可配置控制组件，每个控制组件连接到计算组件之一和控制组件，以产生用于计算组件的至少一个计算指令; 以及配置控制组件的第二组信号。