公开(公告)号：US07074716B2

公开(公告)日：2006-07-11

申请号：US11195986

申请日：2005-08-02

Applicant: Jae Suk Lee ,  Ji A Kim

Inventor： Jae Suk Lee ,  Ji A Kim

IPC: H01L21/4763

CPC classification number: H01L21/76816

Abstract: The present invention relates to a method of manufacturing a semiconductor device which may stably transfer an electrical signal by forming a plurality of via holes and contact holes to an underlying conductive layer. According to the present invention, even though a contact or via is electrically shorted, it is possible to stably transfer the electrical signal through the other contact hole(s) or via hole(s). The present method includes: forming a first conductive line on a semiconductor substrate; forming an insulating layer on the semiconductor substrate and the first conductive line; forming a plurality of via holes by selectively etching the insulating layer in order to expose the first conductive line; forming a metal barrier on top of the insulating layer and in the via holes; and forming a plug by depositing a conductive layer sufficiently to fill the via holes, and then planarizing the conductive layer to coplanarity with the insulating layer.

公开(公告)号：US06964920B2

公开(公告)日：2005-11-15

申请号：US10733884

申请日：2003-12-03

Applicant: Ja Suk Lee ,  Ji A Kim

Inventor： Ja Suk Lee ,  Ji A Kim

IPC: H01L21/28 ,  H01L21/768 ,  H01L21/4763

CPC classification number: H01L21/76816

Abstract: The present invention relates to a method of manufacturing a semiconductor device which may stably transfer an electrical signal by forming a plurality of via holes and contact holes to an underlying conductive layer. According to the present invention, even though a contact or via is electrically shorted, it is possible to stably transfer the electrical signal through the other contact hole(s) or via hole(s). The present method includes: forming a first conductive line on a semiconductor substrate; forming an insulating layer on the semiconductor substrate and the first conductive line; forming a plurality of via holes by selectively etching the insulating layer in order to expose the first conductive line; forming a metal barrier on top of the insulating layer and in the via holes; and forming a plug by depositing a conductive layer sufficiently to fill the via holes, and then planarizing the conductive layer to coplanarity with the insulating layer.

Abstract translation: 本发明涉及一种制造半导体器件的方法，该半导体器件可以通过向下面的导电层形成多个通孔和接触孔来稳定地传递电信号。 根据本发明，即使接触或通路电气短路，也可以通过另一个接触孔或通孔稳定地传递电信号。 本发明的方法包括：在半导体衬底上形成第一导电线; 在所述半导体衬底和所述第一导电线上形成绝缘层; 通过选择性地蚀刻所述绝缘层以暴露所述第一导电线而形成多个通孔; 在绝缘层的顶部和通孔中形成金属阻挡层; 以及通过使导电层充分沉积以填充通孔形成插塞，然后使导电层平坦化以与绝缘层共面。