公开(公告)号：US08065506B2

公开(公告)日：2011-11-22

申请号：US12193455

申请日：2008-08-18

申请人： Jinwen Xi ,  Roman Staszewski ,  Thang Minh Tran

发明人： Jinwen Xi ,  Roman Staszewski ,  Thang Minh Tran

IPC分类号： G06F17/00

CPC分类号： G06F9/3885 ,  G06F9/30036

摘要： This invention is an application specific integrated processor to implement the complete fixed-rate DRX signal processing paths (FDRX) for a reconfigurable processor-based multi-mode 3G wireless application. This architecture is based on the baseline 16-bit RISC architecture with addition functional blocks (ADU) tightly coupled with the based processor's data path. Each ADU accelerates a computation-intensive tasks in FDRX signal path, such as multi-tap FIRs, IIRs, complex domain and vectored data processing. The ADUs are controlled through custom instructions based on the load/store architecture. The whole FDRX data path can be easily implemented by the software employing these custom instructions.

摘要翻译： 本发明是一种专用集成处理器，用于实现用于可重新配置的基于处理器的多模3G无线应用的完整固定速率DRX信号处理路径（FDRX）。 该架构基于16位RISC架构，附加功能块（ADU）与基于处理器的数据路径紧密耦合。 每个ADU加速FDRX信号路径中的计算密集型任务，如多抽头FIR，IIR，复杂域和矢量数据处理。 ADU通过基于加载/存储架构的定制指令进行控制。 整个FDRX数据路径可以通过使用这些定制指令的软件轻松实现。

公开(公告)号：US20120131080A1

公开(公告)日：2012-05-24

申请号：US12952193

申请日：2010-11-22

申请人： Maged F. Barsoum ,  Jinwen Xi ,  Dariush Dabiri

发明人： Maged F. Barsoum ,  Jinwen Xi ,  Dariush Dabiri

IPC分类号： G06F17/10

CPC分类号： H03H17/04 ,  H03H2218/06

摘要： Methods and systems for multi-input IIR filters with error feedback are disclosed. By using multiple-inputs to generate multiple outputs during each iteration, a multi-input IIR filter in accordance with the present invention has greatly increased throughput. Furthermore, the addition of a multi-variable error feedback unit in accordance with the present invention in a multiple-input IIR filter can greatly increase the accuracy of the multi-variable IIR Filter.

摘要翻译： 公开了具有误差反馈的多输入IIR滤波器的方法和系统。 通过在每次迭代期间通过使用多输入来产生多个输出，根据本发明的多输入IIR滤波器大大提高了吞吐量。 此外，在多输入IIR滤波器中添加根据本发明的多变量误差反馈单元可以大大提高多变量IIR滤波器的精度。

公开(公告)号：US08645446B2

公开(公告)日：2014-02-04

申请号：US12952193

申请日：2010-11-22

申请人： Maged F. Barsoum ,  Jinwen Xi ,  Dariush Dabiri

发明人： Maged F. Barsoum ,  Jinwen Xi ,  Dariush Dabiri

IPC分类号： G06F17/10

CPC分类号： H03H17/04 ,  H03H2218/06

摘要： Methods and systems for multi-input IIR filters with error feedback are disclosed. By using multiple-inputs to generate multiple outputs during each iteration, a multi-input IIR filter in accordance with the present invention has greatly increased throughput. Furthermore, the addition of a multi-variable error feedback unit in accordance with the present invention in a multiple-input IIR filter can greatly increase the accuracy of the multi-variable IIR Filter.

摘要翻译： 公开了具有误差反馈的多输入IIR滤波器的方法和系统。 通过在每次迭代期间通过使用多输入来产生多个输出，根据本发明的多输入IIR滤波器大大提高了吞吐量。 此外，在多输入IIR滤波器中添加根据本发明的多变量误差反馈单元可以大大提高多变量IIR滤波器的精度。

公开(公告)号：US20090063820A1

公开(公告)日：2009-03-05

申请号：US12193455

申请日：2008-08-18

申请人： Jinwen Xi ,  Roman Staszewski ,  Thang Minh Tran

发明人： Jinwen Xi ,  Roman Staszewski ,  Thang Minh Tran

IPC分类号： G06F9/30

CPC分类号： G06F9/3885 ,  G06F9/30036

摘要： This invention is an application specific integrated processor to implement the complete fixed-rate DRX signal processing paths (FDRX) for a reconfigurable processor-based multi-mode 3G wireless application. This architecture is based on the baseline 16-bit RISC architecture with addition functional blocks (ADU) tightly coupled with the based processor's data path. Each ADU accelerates a computation-intensive tasks in FDRX signal path, such as multi-tap FIRs, IIRs, complex domain and vectored data processing. The ADUs are controlled through custom instructions based on the load/store architecture. The whole FDRX data path can be easily implemented by the software employing these custom instructions.

摘要翻译： 本发明是一种专用集成处理器，用于实现用于可重新配置的基于处理器的多模3G无线应用的完整固定速率DRX信号处理路径（FDRX）。 该架构基于16位RISC架构，附加功能块（ADU）与基于处理器的数据路径紧密耦合。 每个ADU加速FDRX信号路径中的计算密集型任务，如多抽头FIR，IIR，复杂域和矢量数据处理。 ADU通过基于加载/存储架构的定制指令进行控制。 整个FDRX数据路径可以通过使用这些定制指令的软件轻松实现。