Memory array with current limiting device for preventing particle induced latch-up
    1.
    发明授权
    Memory array with current limiting device for preventing particle induced latch-up 有权
    具有限流装置的存储器阵列,用于防止粒子诱发的闩锁

    公开(公告)号:US07196925B1

    公开(公告)日:2007-03-27

    申请号:US10927583

    申请日:2004-08-26

    CPC classification number: G11C11/413

    Abstract: A memory device can include a group of memory cells, which can be arranged in a column (100) that receives power by way of a first cell supply nodes (106-0 to 106-m). A current limiter (110) can be situated between first cell supply nodes (106-0 to 106-m) and a power supply (VH), and limit a current (llimit) to less than a latch-up holding current (lhold_lu) for the group of memory cells (100). In a particle event, such as an α-particle strike, a current limiter (110) can prevent a latch-up holding current (lhold_lu) from developing, thus preventing latch-up from occurring. Current limiter (110) can include p-channel transistors and/or resistors, and thus consume a relatively small area of the memory device.

    Abstract translation: 存储器设备可以包括一组存储器单元,其可以被布置在通过第一单元电源节点(106-0至106-m)接收电力的列(100)中。 电流限制器(110)可以位于第一单元电源节点(106-0至106-m)和电源(VH)之间,并将电流(限制)限制为小于闭锁保持电流(lhold_lu) 用于存储单元组(100)。 在诸如α粒子撞击的粒子事件中,限流器(110)可以防止闩锁保持电流(lhold_lu)发展,从而防止发生闩锁。 限流器(110)可以包括p沟道晶体管和/或电阻器,因此消耗存储器件的相对小的面积。

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