公开(公告)号：US5691940A

公开(公告)日：1997-11-25

申请号：US656553

申请日：1996-05-31

Applicant: Andrew Marshall ,  Kenneth G. Buss ,  Ross E. Teggatz ,  Joe A. Devore

Inventor： Andrew Marshall ,  Kenneth G. Buss ,  Ross E. Teggatz ,  Joe A. Devore

IPC: G01R31/30 ,  G06F1/30 ,  G11C11/34

CPC classification number: G01R31/3004 ,  G06F1/30

Abstract: A method and apparatus for programmable current limits is provided in which a plurality of current limit programmable cells (44 and 46) are programmed with a current limit. Output circuitry (14 and 16) which outputs current is limited by current limit circuitry (20, 24, 38, 40, and 42) when the output current reaches the programmed current limit.

Abstract translation: 提供了一种用于可编程电流限制的方法和装置，其中多个限流可编程单元（44和46）被编程为电流限制。 当输出电流达到编程电流极限时，输出电流的输出电路（14和16）受限流电路（20,24,38,40和42）限制。

公开(公告)号：US5424669A

公开(公告)日：1995-06-13

申请号：US055071

申请日：1993-04-29

Applicant: Ross E. Teggatz ,  Joe A. Devore

Inventor： Ross E. Teggatz ,  Joe A. Devore

IPC: H03K17/081 ,  H03K17/16 ,  H03H11/26

CPC classification number: H03K17/08104 ,  H03K17/164

Abstract: A slope control circuit having a plurality of resistive elements connected in parallel, each of the resistive elements including a control element for causing the associated resistive elements to be one of electrically conductive or electrically nonconductive, a delay circuit having a plurality of delay components coupled together in series, each of the delay components having a predetermined delay, the junction of each different adjacent pair of the delay components being coupled to the control element of a different one of the resistive elements and a load circuit coupled across the plurality of resistive elements. The circuit can further include a delay adjust circuit for adjusting the delay of each of the delay components, either initially or on-line. The resistance of each of the resistive elements can be the same or different. The plurality of resistive elements and the delay components are all disposed on a single semiconductor chip.

Abstract translation: 一种具有并联连接的多个电阻元件的斜率控制电路，每个电阻元件包括用于使相关联的电阻元件为导电或不导电的控制元件，具有耦合在一起的多个延迟元件的延迟电路 串联地，每个延迟部件具有预定的延迟，每个不同的相邻延迟部件对的结被耦合到不同的电阻元件的控制元件和耦合在多个电阻元件上的负载电路。 该电路还可以包括延迟调整电路，用于调整每个延迟部件的延迟，或者是初始的或在线的。 每个电阻元件的电阻可以相同或不同。 多个电阻元件和延迟元件都设置在单个半导体芯片上。