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公开(公告)号：US07123430B2
公开(公告)日：2006-10-17
申请号：US11122519
申请日：2005-05-05
CPC分类号： G11B20/10194 , G11B5/09 , G11B20/1403
摘要： A method and apparatus for providing write pre-compensation using a read timing path is disclosed. The present invention generates a first phase clock signal having a first phase and being synchronized with a read signal of a read path, generates a second phase clock signal having a second phase at a predetermined phase difference with the first clock signal and uses the first and second clock signals to shift write data to achieve write data comprising a first desired pre-compensation.
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公开(公告)号：US07027243B2
公开(公告)日：2006-04-11
申请号：US10811523
申请日：2004-03-29
IPC分类号： G11B5/09
CPC分类号： G11B20/10009
摘要： An apparatus for providing head amplitude characterization is disclosed. A DAC is used to apply known signals to a variable gain amplifier in the front end of a read channel. The signal is processed through the read channel and at the output of an ADC, the signal is read and used to determine the input channel amplitude. Knowing the amplitude of the two input signals, the ADC code spread and the two VGA gain codes, an equation is generated for determining the amplitude of a head.
摘要翻译： 公开了一种用于提供头振幅表征的装置。 DAC用于将已知信号应用于读通道前端的可变增益放大器。 该信号通过读通道和ADC的输出进行处理，该信号被读取并用于确定输入通道幅度。 了解两个输入信号的幅度，ADC代码扩展和两个VGA增益代码，生成一个用于确定磁头幅度的方程式。
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3.发明授权Method and apparatus for providing write pre-compensation using a read timing path 有权使用读取定时路径提供写入预补偿的方法和装置公开(公告)号：US07123429B2
公开(公告)日：2006-10-17
申请号：US10787308
申请日：2004-02-26
CPC分类号： G11B20/10194 , G11B5/09 , G11B20/1403
摘要： A method and apparatus for providing write pre-compensation using a read timing path is disclosed. The present invention generates a first phase clock signal having a first phase and being synchronized with a read signal of a read path, generates a second phase clock signal having a second phase at a predetermined phase difference with the first clock signal and uses the first and second clock signals to shift write data to achieve write data comprising a first desired pre-compensation.
摘要翻译： 公开了一种使用读取定时路径提供写入预补偿的方法和装置。 本发明产生具有第一相位并与读取路径的读取信号同步的第一相位时钟信号，产生具有与第一时钟信号预定相位差的第二相位的第二相位时钟信号，并使用第一和第 第二时钟信号以移位写数据以实现包括第一期望预补偿的写数据。
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公开(公告)号：US5233482A
公开(公告)日：1993-08-03
申请号：US739020
申请日：1991-07-31
CPC分类号： G11B20/10009 , G11B19/04 , G11B20/18 , G11B20/24 , G11B5/6076
摘要： Apparatus and method of thermal asperity compensation are provided for data detection in a partial-response maximum-likelihood (PRML) data channel. The PRML data channel includes an analog to digital converter (ADC) having a normal operating range and a filter, gain and timing control coupled to the ADC. When a thermal asperity is detected, a thermal asperity recovery mode is established responsive to the detected thermal asperity. The gain and timing control are held and the normal operating range of the ADC is adjusted responsive to the thermal asperity recovery mode. Also an AC coupling pole frequency is elevated responsive to the thermal asperity recovery mode.
摘要翻译： 为部分响应最大似然（PRML）数据通道中的数据检测提供了热粗糙度补偿的装置和方法。 PRML数据通道包括具有正常操作范围的模数转换器（ADC）和耦合到ADC的滤波器，增益和定时控制。 当检测到热粗糙度时，响应于检测到的热不均匀性而建立热凹凸恢复模式。 保持增益和时序控制，并根据热凹凸恢复模式调整ADC的正常工作范围。 响应于热凹凸恢复模式，AC耦合极点频率也升高。
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公开(公告)号：US4853802A
公开(公告)日：1989-08-01
申请号：US114478
申请日：1987-10-28
CPC分类号： G11B20/10046 , G11B20/10009 , G11B5/035
摘要： An equalizer circuit is shown which conditions a read back signal from a data storage device by performing amplitude correction (pulse slimming) and phase correction. The circuit provides a simplified single stage that effects both amplitude and phase correction and does so using components that can be selected or adjusted independently of one another. Further, the principal embodiment shows a single ended circuit that provides the function with a minimum number of components to conserve space on the circuit card as well as reducing cost.
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6.发明授权公开(公告)号：US07027245B2
公开(公告)日：2006-04-11
申请号：US10837275
申请日：2004-04-30
IPC分类号： G11B5/09
CPC分类号： G11B20/10055 , G11B20/10009 , G11B20/10027
摘要： An apparatus for providing head amplitude characterization using gain loops is disclosed. A variable gain amplifier (VGA) receiving input signals and generates a VGA output signal. A digital-to-analog converter (DAC) circuit provides a desired input signal to the VGA and a gain control loop drives the VGA to gain lock the VGA to the provided desired input signal. An analog-to-digital converter (ADC) provides a digital output representing an ADC code spread in response to the VGA output. A controller drives the DAC to provide the desired input signal to the VGA and generates control signals for controlling the ADC, the controller further determines read head channel amplitude based upon the signal provided to the DAC, the ADC code spread received from the ADC and gain code provided by the gain control loops.
摘要翻译： 公开了一种使用增益环提供磁头幅度表征的装置。 一个可变增益放大器（VGA）接收输入信号并产生VGA输出信号。 数模转换器（DAC）电路向VGA提供所需的输入信号，增益控制环驱动VGA以将VGA锁定到所需的输入信号。 模数转换器（ADC）提供表示响应于VGA输出的ADC代码扩展的数字输出。 控制器驱动DAC以向VGA提供所需的输入信号，并产生用于控制ADC的控制信号，控制器还根据提供给DAC的信号，从ADC接收的ADC代码扩展和增益确定读取头信道幅度 由增益控制回路提供的代码。
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公开(公告)号：US07002764B2
公开(公告)日：2006-02-21
申请号：US10787291
申请日：2004-02-26
申请人： Firmin M. Musungu , Joey M. Poss , Brent A. Sadowy
发明人： Firmin M. Musungu , Joey M. Poss , Brent A. Sadowy
IPC分类号： G11B5/09
CPC分类号： G11B20/10194 , G11B5/09
摘要： A method and apparatus providing generalized write pre-compensation is disclosed. The present invention provides multiple phase signals to choose from for provide a shift to received write data to achieve a desired pre-compensation.
摘要翻译： 公开了提供广义写入预补偿的方法和装置。 本发明提供多个相位信号以供选择以提供对所接收的写入数据的转换以实现期望的预补偿。
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