公开(公告)号：US07026806B2

公开(公告)日：2006-04-11

申请号：US10604183

申请日：2003-06-30

申请人： John M. Blondin ,  Gene T. Patrick ,  Kevin M. Potasiewicz

发明人： John M. Blondin ,  Gene T. Patrick ,  Kevin M. Potasiewicz

IPC分类号： G01R31/00

CPC分类号： G01R31/2886 ,  G01R1/18

摘要： An apparatus and a method for testing semiconductor devices such as integrated circuits having a handler for picking up an integrated circuit to be tested and placing the picked up integrated circuit into an automatic circuit test apparatus. When the circuit to be tested is inserted into the test apparatus an extraneous signal shield is automatically engaged to enclose the device being tested and protect the circuit, being tested, from stray extraneous electromagnetic signals during the test thereby preventing said stray electromagnetic interference from inducing errors in the tested circuit.

摘要翻译： 一种用于测试半导体器件的装置和方法，例如具有用于拾取要测试的集成电路的处理器的集成电路，并将拾取的集成电路放置在自动电路测试装置中。 当要测试的电路插入测试设备时，将自动接合外部信号屏蔽，以封闭被测试的设备，并在测试期间保护被测电路免受杂散电磁信号的影响，从而防止所述杂散电磁干扰引起错误 在测试电路中。

公开(公告)号：US06921288B2

公开(公告)日：2005-07-26

申请号：US10707169

申请日：2003-11-25

申请人： John M. Blondin ,  Gene T. Patrick

发明人： John M. Blondin ,  Gene T. Patrick

IPC分类号： H01R31/08

CPC分类号： H01R31/08

摘要： A semi-conductor module burn-in test apparatus having a plurality burn-in boards each of which is provided a plurality of module test sockets thereon and each test socket is coupled to an adjacent test socket by with a high current, open/short split power connector that can readily connected to or disconnected from said adjacent test socket by coupling together the power inputs of the adjacent sockets or uncoupling the previously coupled power inputs of adjacent sockets and thereby selectively altering the current carrying levels available to said adjacent test sockets.

摘要翻译： 一种具有多个老化板的半导体模块老化测试装置，每个老化板在其上设置有多个模块测试插座，每个测试插座通过高电流，开/短分离耦合到相邻的测试插座 电源连接器，其可以容易地连接到所述相邻测试插座或从所述相邻测试插座断开，将相邻插座的电源输入耦合在一起，或者将相邻插座的先前耦合的功率输入端分开，从而选择性地改变所述相邻测试插座可用的电流负载水平。

公开(公告)号：US5888838A

公开(公告)日：1999-03-30

申请号：US90563

申请日：1998-06-04

申请人： Ronald Lee Mendelson ,  Robert Francis Cook ,  David Frederick Diefenderfer ,  Eric Gerhard Liniger ,  John M. Blondin ,  Donald W. Brouillette

发明人： Ronald Lee Mendelson ,  Robert Francis Cook ,  David Frederick Diefenderfer ,  Eric Gerhard Liniger ,  John M. Blondin ,  Donald W. Brouillette

IPC分类号： H01L21/304 ,  H01L21/306 ,  H01L21/50 ,  H01L23/544 ,  G01N31/26

CPC分类号： H01L21/304 ,  H01L21/50 ,  H01L23/544 ,  H01L2223/54473 ,  H01L2924/0002 ,  Y10S148/162 ,  Y10S438/928 ,  Y10S438/973

摘要： A method is described by which the mechanical strength of chips of semiconductor devices can be controlled by appropriate wafer finishing and sorted by knowledge of the finishing method and chip and wafer geometry. The control and sorting derive from a knowledge of the geometry of the striations remaining on the back of chips after the wafer-grinding finishing step.

摘要翻译： 描述了一种方法，通过该方法可以通过适当的晶片整理来控制半导体器件的芯片的机械强度，并根据整理方法和芯片和晶片几何的知识进行分类。 控制和排序来自于在晶片磨削精加工步骤之后的剩余在芯片背面上的条纹的几何形状的知识。

公开(公告)号：US06171873B2

公开(公告)日：2001-01-09

申请号：US09221825

申请日：1998-12-28

申请人： Ronald Lee Mendelson ,  Robert Francis Cook ,  David Frederick Diefenderfer ,  Eric Gerhard Liniger ,  John M. Blondin ,  Donald W. Brouillette

发明人： Ronald Lee Mendelson ,  Robert Francis Cook ,  David Frederick Diefenderfer ,  Eric Gerhard Liniger ,  John M. Blondin ,  Donald W. Brouillette

IPC分类号： G01R3126

CPC分类号： H01L21/304 ,  H01L21/50 ,  H01L23/544 ,  H01L2223/54473 ,  H01L2924/0002 ,  Y10S148/162 ,  Y10S438/928 ,  Y10S438/973 ,  H01L2924/00

摘要： A method is described by which the mechanical strength of chips of semiconductor devices can be controlled by appropriate wafer finishing and sorted by knowledge of the finishing method and chip and wafer geometry. The control and sorting derive from a knowledge of the geometry of the striations remaining on the back of chips after the wafer-grinding finishing step.

摘要翻译： 描述了一种方法，通过该方法可以通过适当的晶片整理来控制半导体器件的芯片的机械强度，并根据整理方法和芯片和晶片几何的知识进行分类。 控制和排序来自于在晶片磨削精加工步骤之后的剩余在芯片背面上的条纹的几何形状的知识。