摘要:
A computer implemented method employs software on a system for generating a logical representation of an electronic circuit undergoing a design. A predetermined grid for the circuit being designed is selected through interaction with the user through a graphical user interface. An input file defines objects to be plotted to the grid, and is read into a computer system. Objection locations relative to the grid, and connections between objects are checked and adjustments made by moving objects as necessary to align with the grid and to ensure connections between the objects. A design file of the adjusted logical representation is written for use in completing a circuit design.
摘要:
A power regulation scheme includes a first voltage regulation portion connected in parallel with a second voltage regulation portion that regulates a voltage if an open condition occurs within the first voltage regulation portion. Each voltage regulation portion may include a first voltage regulator connected in series with a second voltage regulator that regulates the voltage if a short condition occurs within the first voltage regulator. Each voltage regulation portion may utilize a switching element to route an output voltage of the first voltage regulator past the second voltage regulator if the output voltage has been regulated and/or to force the output voltage to be regulated by the second voltage regulator if the output voltage has not been regulated.
摘要:
A power regulation circuit includes at least a first regulator connected to a second regulator in series forming a first regulator pair and a third regulator connected to a fourth regulator in series forming a second regulator pair. The first regulator pair is connected in parallel with the second regulator pair. Each individual regulator is configured to separately regulate an input voltage to a predetermined regulated output voltage. The second regulator pair regulates the input voltage if a short condition occurs within the first regulator pair and the second and fourth regulators each regulate the input voltage if an open condition occurs within the first or third regulator respectively.
摘要:
A power regulation scheme includes a first voltage regulation portion having a first voltage regulator, a second voltage regulator, and a switching system. The first voltage regulation portion is connected in parallel with a second voltage regulation portion. The second voltage regulation portion regulates an input voltage if an open condition occurs within the first voltage regulation portion. The switching system forces the second voltage regulator to regulate the input voltage if a short condition occurs within the first voltage regulator.
摘要:
A power regulation scheme includes a first voltage regulation portion connected in parallel with a second voltage regulation portion that regulates a voltage if an open condition occurs within the first voltage regulation portion. Each voltage regulation portion may include a first voltage regulator connected in series with a second voltage regulator that regulates the voltage if a short condition occurs within the first voltage regulator. Each voltage regulation portion may utilize a switching element to route an output voltage of the first voltage regulator past the second voltage regulator if the output voltage has been regulated and/or to force the output voltage to be regulated by the second voltage regulator if the output voltage has not been regulated.
摘要:
A power regulation scheme includes a first voltage regulation portion having a first voltage regulator, a second voltage regulator, and a switching system. The first voltage regulation portion is connected in parallel with a second voltage regulation portion. The second voltage regulation portion regulates an input voltage if an open condition occurs within the first voltage regulation portion. The switching system forces the second voltage regulator to regulate the input voltage if a short condition occurs within the first voltage regulator.
摘要:
A power regulation circuit includes at least a first regulator connected to a second regulator in series forming a first regulator pair and a third regulator connected to a fourth regulator in series forming a second regulator pair. The first regulator pair is connected in parallel with the second regulator pair. Each individual regulator is configured to separately regulate an input voltage to a predetermined regulated output voltage. The second regulator pair regulates the input voltage if a short condition occurs within the first regulator pair and the second and fourth regulators each regulate the input voltage if an open condition occurs within the first or third regulator respectively.
摘要:
A computer implemented method employs software on a system for generating a logical representation of an electronic circuit undergoing a design. A predetermined grid for the circuit being designed is selected through interaction with the user through a graphical user interface. An input file defines objects to be plotted to the grid, and is read into a computer system. Objection locations relative to the grid, and connections between objects are checked and adjustments made by moving objects as necessary to align with the grid and to ensure connections between the objects. A design file of the adjusted logical representation is written for use in completing a circuit design.
摘要:
Implementing spread spectrum using digital signal processing techniques. An incoming clock signal is received and sampled using a programmable sampling mechanism to generate a plurality of signal data points included in a sampled signal. The sampled signal is conditioned using a programmable signal conditioning mechanism capable of performing at least one of: reducing a cycle to cycle jitter of the sampled signal; or adjusting the sampled signal to a base frequency. The signal data points are processed and spread across a band of frequencies using a programmable digital signal processor to adjust at least one of: (a) an amplitude, (b) a phase shift, or (c) a frequency shift; for each of a plurality of respective signal data points at a plurality of corresponding frequencies in the band of frequencies. An output waveform is constructed from the processed and spread signal data points, wherein the output waveform constitutes a clock output signal.