公开(公告)号：US07764103B2

公开(公告)日：2010-07-27

申请号：US12197894

申请日：2008-08-25

Applicant: Mahdi Bagheri ,  Kaveh Moazzami ,  Filipp A. Baron ,  Mohammad E. Heidari ,  Rahim Bagheri

Inventor： Mahdi Bagheri ,  Kaveh Moazzami ,  Filipp A. Baron ,  Mohammad E. Heidari ,  Rahim Bagheri

IPC: H03H11/16 ,  H03K3/00 ,  H03K5/13

CPC classification number: H03D3/009 ,  H03H7/21

Abstract: In one embodiment, the present invention includes an electronic circuit comprising a first stage having a first differential inductive element and a second differential inductive element, and a second stage coupled to an output of the first stage, the second stage having a first differential inductive element and a second differential inductive element, wherein the first and second differential inductive elements of the first stage couple magnetically to generate a first phase error, wherein the first and second differential inductive elements of the second stage couple magnetically to generate a second phase error, and wherein the second phase error cancels the first phase error.

Abstract translation: 在一个实施例中，本发明包括电子电路，其包括具有第一差分电感元件和第二差分电感元件的第一级，以及耦合到第一级的输出的第二级，第二级具有第一差分电感元件 和第二差分电感元件，其中第一级的第一和第二差分电感元件以磁性方式耦合以产生第一相位误差，其中第二级的第一和第二微分电感元件磁耦合以产生第二相位误差，以及 其中所述第二相位误差抵消所述第一相位误差。

公开(公告)号：US20100045404A1

公开(公告)日：2010-02-25

申请号：US12197894

申请日：2008-08-25

Applicant: Mahdi Bagheri ,  Kaveh Moazzami ,  Filipp A. Baron ,  Mohammad E. Heidari ,  Rahim Bagheri

Inventor： Mahdi Bagheri ,  Kaveh Moazzami ,  Filipp A. Baron ,  Mohammad E. Heidari ,  Rahim Bagheri

IPC: H03H7/38

CPC classification number: H03D3/009 ,  H03H7/21

Abstract: In one embodiment, the present invention includes an electronic circuit comprising a first stage having a first differential inductive element and a second differential inductive element, and a second stage coupled to an output of the first stage, the second stage having a first differential inductive element and a second differential inductive element, wherein the first and second differential inductive elements of the first stage couple magnetically to generate a first phase error, wherein the first and second differential inductive elements of the second stage couple magnetically to generate a second phase error, and wherein the second phase error cancels the first phase error.

Abstract translation: 在一个实施例中，本发明包括电子电路，其包括具有第一差分电感元件和第二差分电感元件的第一级，以及耦合到第一级的输出的第二级，第二级具有第一差分电感元件 和第二差分电感元件，其中第一级的第一和第二差分电感元件以磁性方式耦合以产生第一相位误差，其中第二级的第一和第二微分电感元件磁耦合以产生第二相位误差，以及 其中所述第二相位误差抵消所述第一相位误差。

公开(公告)号：US20100044093A1

公开(公告)日：2010-02-25

申请号：US12197866

申请日：2008-08-25

Applicant: Kaveh Moazzami ,  Mahdi Bagheri ,  Edris Rostami ,  Rahim Bagheri

Inventor： Kaveh Moazzami ,  Mahdi Bagheri ,  Edris Rostami ,  Rahim Bagheri

IPC: H01R12/04

CPC classification number: H05K1/0228 ,  H04L25/0272 ,  H05K1/0245 ,  H05K3/4685 ,  H05K2201/097

Abstract: In one embodiment the present invention includes an electrical arrangement comprising conductive elements such as electrical traces. The conductive elements carry differential signals. The conductive elements extend horizontally and have alternating sections around one or more center lines. Ground lines may be included the further enhance signal integrity. In one embodiment, magnetic field cancellation may be achieved by providing an offset between pairs of alternating differential elements.

Abstract translation: 在一个实施例中，本发明包括电气装置，其包括诸如电迹线的导电元件。 导电元件携带差分信号。 导电元件水平延伸并且围绕一个或多个中心线具有交替的部分。 接地线可能包括进一步增强的信号完整性。 在一个实施例中，可以通过在交替的差分元件对之间提供偏移来实现磁场消除。