公开(公告)号：US5343615A

公开(公告)日：1994-09-06

申请号：US853798

申请日：1992-03-19

申请人： Michio Sono ,  Akihiro Kubota ,  Junichi Kasai ,  Masanori Yoshimoto ,  Keiichi Masaki

发明人： Michio Sono ,  Akihiro Kubota ,  Junichi Kasai ,  Masanori Yoshimoto ,  Keiichi Masaki

IPC分类号： H01L23/50 ,  H01L23/495 ,  H01R43/00 ,  B29B13/00

CPC分类号： H01L23/49541 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/181 ,  Y10T29/49121

摘要： A process for producing a semiconductor device having a package with a semiconductor element molded therein, and a plurality of leads, each constituted by an inner lead located inside the package and an outer lead located outside the package, the leads being arranged in a line at a predetermined pitch, and the semiconductor element being electrically connected to the inner lead of each of the leads, wherein each side edge of each of the outer leads is flat.

摘要翻译： 一种制造半导体器件的方法，所述半导体器件具有其中模制有半导体元件的封装，以及多个引线，每个引线由位于所述封装内部的内引线和位于所述封装外部的外引线构成，所述引线以 预定间距，并且半导体元件电连接到每个引线的内引线，其中每个外引线的每个侧边均为平坦的。

公开(公告)号：US07064001B2

公开(公告)日：2006-06-20

申请号：US10216776

申请日：2002-08-13

申请人： Youichi Kazama ,  Keiichi Masaki

发明人： Youichi Kazama ,  Keiichi Masaki

IPC分类号： H01L21/44

CPC分类号： H01L21/4832 ,  H01L23/3107 ,  H01L2224/48091 ,  H01L2924/18165 ,  H01L2924/00014

摘要： A method of production of a semiconductor module comprised of a semiconductor chip, external connection terminal pads for bonding with solder balls or other external connection terminals, wires electrically connecting the same, and a sealing resin layer sealing the semiconductor chip, external connection terminal pds, and wires, where surfaces of the external connection terminal pads are exposed at bottoms of recesses formed in the sealing resin layer, comprising sealing by a resin external connection terminal pads and soluble metal layers formed at surfaces of the metal substrate by electroplating to form a sealing resin layer at that one surface, then etching away the metal substrate and soluble metal layers to thereby form in the resin sealing layer recesses exposing the external connection terminal pads at their bottoms by a single etching process without requiring special etching stop control.

摘要翻译： 一种制造半导体模块的方法，包括半导体芯片，用于与焊球或其它外部连接端子接合的外部连接端子焊盘，以及与其连接的电线以及密封半导体芯片的密封树脂层，外部连接端子pds， 以及外部连接端子焊盘的表面暴露在密封树脂层中形成的凹部的底部的电线，包括通过电镀在树脂外部连接端子焊盘和形成在金属基板的表面处的可溶性金属层进行密封以形成密封 树脂层，然后蚀刻掉金属基底和可溶性金属层，从而在树脂密封层中形成通过单个蚀刻工艺暴露外部连接端子焊盘的凹部，而不需要特殊的蚀刻停止控制。