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公开(公告)号:US20120159269A1
公开(公告)日:2012-06-21
申请号:US13384012
申请日:2010-07-08
IPC分类号: G06F11/00
CPC分类号: G01R31/31816 , G01R31/002 , G01R31/307 , G11C11/4125 , G11C29/04 , H03K19/0033
摘要: Disclosed is means for quantifying resistance to soft errors in a logic circuit. A logic block group 120 having at least one set comprising a logic block having at least one logic circuit and a sequential circuit that inputs the output of the logic block is arranged in an irradiation region 110 of a high-energy particle irradiation device, and subjected to irradiation with high-energy particles. A control section 101 calculates the error rate of the logic circuit from the value obtained by subtracting the number of errors of the sequential circuit when the logic block of the logic block group 120 is bypassed, from the number of errors of the sequential circuit and the logic block of the logic block group 120.
摘要翻译: 公开了用于量化逻辑电路中的软错误的抵抗力的手段。 具有至少一个包括具有至少一个逻辑电路的逻辑块和输入逻辑块的输出的时序电路的逻辑块组120被布置在高能粒子照射装置的照射区域110中, 用高能粒子照射。 控制部101根据从逻辑块组120的逻辑块旁路而减去顺序电路的误差数,从顺序电路的误差数和 逻辑块组120的逻辑块。
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公开(公告)号:US08892967B2
公开(公告)日:2014-11-18
申请号:US13384012
申请日:2010-07-08
IPC分类号: G06F11/00 , G11C29/04 , G01R31/3181 , G11C11/412 , H03K19/003 , G01R31/00 , G01R31/307
CPC分类号: G01R31/31816 , G01R31/002 , G01R31/307 , G11C11/4125 , G11C29/04 , H03K19/0033
摘要: A logic block group 120 having at least one set including a logic block having at least one logic circuit and a sequential circuit that inputs the output of the logic block is arranged in an irradiation region 110 of a high-energy particle irradiation device, and subjected to irradiation with high-energy particles. A control section 101 calculates the error rate of the logic circuit from the value obtained by subtracting the number of errors of the sequential circuit when the logic block of the logic block group 120 is bypassed, from the number of errors of the sequential circuit and the logic block of the logic block group 120.
摘要翻译: 具有至少一个包括具有至少一个逻辑电路的逻辑块和输入逻辑块的输出的时序电路的逻辑块组120被布置在高能粒子照射装置的照射区域110中, 用高能粒子照射。 控制部101根据从逻辑块组120的逻辑块旁路而减去顺序电路的误差数,从顺序电路的误差数和 逻辑块组120的逻辑块。
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