公开(公告)号：US08078661B2

公开(公告)日：2011-12-13

申请号：US10898178

申请日：2004-07-26

申请人： Kenji Mukaida ,  Masahiko Takenaka ,  Naoya Torii ,  Shoichi Masui

发明人： Kenji Mukaida ,  Masahiko Takenaka ,  Naoya Torii ,  Shoichi Masui

IPC分类号： G06F7/38

CPC分类号： G06F7/728 ,  G06F7/5443

摘要： A multiple-word multiplication-accumulation circuit suitable for use with a single-port memory. The circuit is composed of a multiplication-accumulation (MAC) operator and surrounding registers. The MAC operator has multiplicand and multiplier input ports with different bit widths to calculate a sum of products of multiple-word data read out of a memory. The registers serve as buffer storage of multiple-word data to be supplied to individual input ports of the MAC operator. The amount of data supplied to the MAC operator in each clock cycle is adjusted such that total amount of data consumed and produced by the MAC operator in one clock cycle will be equal to or smaller than the maximum amount of data that the memory can transfer in one clock cycle. This feature enables the use of a bandwidth-limited single-port memory, without causing adverse effect on the efficiency of MAC operator usage.

摘要翻译： 适用于单端口存储器的多字乘法积累电路。 该电路由乘积（MAC）运算符和周围寄存器组成。 MAC运算符具有不同位宽的乘法器和乘法器输入端口，以计算从存储器读出的多个字数据的乘积之和。 这些寄存器用作缓冲存储多字数据以提供给MAC操作员的各个输入端口。 调整在每个时钟周期内提供给MAC运算符的数据量，使得MAC运算符在一个时钟周期内消耗和产生的数据总量将等于或小于存储器可以传输的最大数据量 一个时钟周期。 该功能使得能够使用带宽限制的单端口存储器，而不会对MAC操作者使用的效率造成不利影响。

公开(公告)号：US07403965B2

公开(公告)日：2008-07-22

申请号：US10888991

申请日：2004-07-13

申请人： Kenji Mukaida ,  Masahiko Takenaka ,  Naoya Torii ,  Shoichi Masui

发明人： Kenji Mukaida ,  Masahiko Takenaka ,  Naoya Torii ,  Shoichi Masui

IPC分类号： G06F7/00

CPC分类号： G06F7/728

摘要： An arithmetic device for Montgomery modular multiplication which quickly calculates a parameter ND, the parameter ND satisfying R×R−1−N×ND=1 for an integer N and a radix R that is coprime to and greater than N, with a large number of effective lower bits. The device comprises an ND generator, a multiplication-accumulation (MAC) operator, and a sum data store. The ND generator produces effective lower bits of ND at a rate of k bits per clock cycle, with reference to lower k bits of a variable S, as well as to lower k bits of an odd positive integer N. The MAC operator multiplies the produced k-bit ND value by N and adds the resulting product to S. The sum data store stores the variable S, which is updated with the output of the MAC operator, with its bits shifted right by k bits, for use by the ND generator in the subsequent clock cycle.

摘要翻译： 一种用于蒙哥马利模乘的运算装置，其快速计算参数ND，对于整数N满足RxR ^{-1 -NxND = 1的参数ND和与N并且大于N的基数R， 大量有效的低位。 该装置包括ND发生器，乘积累加（MAC）运算符和和数据存储。 ND发生器以每个时钟周期的k比特的速率产生有效的低位，参考变量S的低k位，以及降低奇数正整数N的k位。MAC算子将所产生的 k位ND值乘以N，并将所得到的乘积加到S中。和数据存储器存储用MAC运算符的输出更新的变量S，其位被向右移位k位，供ND生成器使用 在随后的时钟周期。}

公开(公告)号：US20050165876A1

公开(公告)日：2005-07-28

申请号：US10898178

申请日：2004-07-26

申请人： Kenji Mukaida ,  Masahiko Takenaka ,  Naoya Torii ,  Shoichi Masui

发明人： Kenji Mukaida ,  Masahiko Takenaka ,  Naoya Torii ,  Shoichi Masui

IPC分类号： G06F7/52 ,  G06F7/544 ,  G06F7/72 ,  G09C1/00 ,  G06F7/38

CPC分类号： G06F7/728 ,  G06F7/5443

摘要： A multiple-word multiplication-accumulation circuit suitable for use with a single-port memory. The circuit is composed of a multiplication-accumulation (MAC) operator and surrounding registers. The MAC operator has multiplicand and multiplier input ports with different bit widths to calculate a sum of products of multiple-word data read out of a memory. The registers serve as buffer storage of multiple-word data to be supplied to individual input ports of the MAC operator. The amount of data supplied to the MAC operator in each clock cycle is adjusted such that total amount of data consumed and produced by the MAC operator in one clock cycle will be equal to or smaller than the maximum amount of data that the memory can transfer in one clock cycle. This feature enables the use of a bandwidth-limited single-port memory, without causing adverse effect on the efficiency of MAC operator usage.

摘要翻译： 适用于单端口存储器的多字乘法积累电路。 该电路由乘积（MAC）运算符和周围寄存器组成。 MAC运算符具有不同位宽的乘法器和乘法器输入端口，以计算从存储器读出的多个字数据的乘积之和。 这些寄存器用作缓冲存储多字数据以提供给MAC操作员的各个输入端口。 调整在每个时钟周期内提供给MAC运算符的数据量，使得MAC运算符在一个时钟周期内消耗和产生的数据总量将等于或小于存储器可以传输的最大数据量 一个时钟周期。 该功能使得能够使用带宽限制的单端口存储器，而不会对MAC操作者使用的效率造成不利影响。

公开(公告)号：US20050165875A1

公开(公告)日：2005-07-28

申请号：US10888991

申请日：2004-07-13

申请人： Kenji Mukaida ,  Masahiko Takenaka ,  Naoya Torii ,  Shoichi Masui

发明人： Kenji Mukaida ,  Masahiko Takenaka ,  Naoya Torii ,  Shoichi Masui

IPC分类号： G06F7/72 ,  G09C1/00 ,  G06F7/00

CPC分类号： G06F7/728

摘要： An arithmetic device for Montgomery modular multiplication which quickly calculates a parameter ND with a large number of effective lower bits. The device comprises an ND generator, a multiplication-accumulation (MAC) operator, and a sum data store. The ND generator produces effective lower bits of ND at a rate of k bits per clock cycle, with reference to lower k bits of a variable S, as well as to lower k bits of an odd positive integer N. The MAC operator multiplies the produced k-bit ND value by N and adds the resulting product to S. The sum data store stores the variable S, which is updated with the output of the MAC operator, with its bits shifted right by k bits, for use by the ND generator in the subsequent clock cycle.

摘要翻译： 一种用于蒙哥马利模数乘法的运算装置，它可以快速计算具有大量有效低位的参数ND。 该装置包括ND发生器，乘积累加（MAC）运算符和和数据存储。 ND发生器以每个时钟周期的k比特的速率产生有效的低位，参考变量S的低k位，以及降低奇数正整数N的k位。MAC算子将所产生的 k位ND值乘以N，并将所得到的乘积加到S中。和数据存储器存储用MAC运算符的输出更新的变量S，其位被向右移位k位，供ND生成器使用 在随后的时钟周期。

公开(公告)号：USD478638S1

公开(公告)日：2003-08-19

申请号：US29169715

申请日：2002-10-21

申请人： Kenji Mukaida

设计人： Kenji Mukaida

公开(公告)号：US20090156088A1

公开(公告)日：2009-06-18

申请号：US12066290

申请日：2005-09-09

申请人： Kenji Mukaida

发明人： Kenji Mukaida

IPC分类号： A63H5/00 ,  A63H30/04 ,  A63H29/00 ,  A63H17/00

CPC分类号： A63H17/34 ,  A63H17/28

摘要： A reality generating device wherein a traveling toy with a chassis and a body includes: an operation sound generating unit for generating operation sounds of the traveling toy during operation; a vibration generating unit attached to the body for causing the body to vibrate; and a travel driving unit provided on the body for causing the traveling toy to travel. If desired, operation sounds and vibrations are simultaneously generated for enhanced reality of the traveling toy.

摘要翻译： 一种现实生成装置，其中具有底盘和主体的行进玩具包括：操作声音产生单元，用于在操作期间产生所述行进玩具的操作声音; 振动产生单元，其附接到所述主体以使所述主体振动; 以及设置在身体上以使旅行玩具行进的旅行驾驶单元。 如果需要，同时产生操作声音和振动，以增强旅行玩具的真实性。

公开(公告)号：US20080143889A1

公开(公告)日：2008-06-19

申请号：US11949207

申请日：2007-12-03

申请人： Kenji MUKAIDA ,  Yoichi MAEDA ,  Yasuo KAGAYA

发明人： Kenji MUKAIDA ,  Yoichi MAEDA ,  Yasuo KAGAYA

IPC分类号： H04N5/64

CPC分类号： H04N5/642 ,  H04N5/775 ,  H04N5/85 ,  H04N5/907 ,  H04N9/3141 ,  H04N9/8042

摘要： A video reproducing apparatus which comprises a radio control signal receiving portion, a video sound data reproducing portion connected to the radio control signal receiving portion, a video projection portion connected to the radio control signal receiving portion and the video sound data reproducing portion, speakers connected to the video sound data reproducing portion, a housing for accommodating the video sound data reproducing portion, the video projection portion, and the speakers, and a housing drive portion for moving the housing, and which drives the housing according to a control signal of the housing drive portion which controls the housing drive portion and which is received by the radio control signal receiving portion, projects the video sound data onto the video projection portion according to a control signal of the video sound data reproducing portion at an arbitrary position, and reproduces the data through the speakers.

摘要翻译： 一种视频再现装置，包括无线电控制信号接收部分，连接到无线电控制信号接收部分的视频声音数据再现部分，连接到无线电控制信号接收部分和视频声音数据再现部分的视频投影部分，扬声器连接 视频声音数据再现部分，用于容纳视频声音数据再现部分的外壳，视频投影部分和扬声器，以及用于移动壳体的壳体驱动部分，并且根据控制信号驱动壳体 控制壳体驱动部并由无线电控制信号接收部接收的壳体驱动部，根据视频声音数据再现部的控制信号在任意位置将视频声音数据投影到视频投影部，并再现 数据通过扬声器。

公开(公告)号：US07202806B2

公开(公告)日：2007-04-10

申请号：US10478044

申请日：2001-05-18

申请人： Kenji Mukaida

发明人： Kenji Mukaida

IPC分类号： A63H30/00

CPC分类号： A63H30/04

摘要： A transmitter for radio control with rotary control means on its both sides is provided.

摘要翻译： 提供了一种用于无线电控制的发射器，其两侧具有旋转控制装置。

公开(公告)号：US20050168373A1

公开(公告)日：2005-08-04

申请号：US10505280

申请日：2002-02-20

申请人： Kenji Mukaida

发明人： Kenji Mukaida

IPC分类号： A63H30/04

CPC分类号： A63H30/04

摘要： A wireless control transmitter for remotely controlling a controlled body of a wireless control apparatus by an electromagnetic wave, which comprises a grip to be grasped by a dominant hand of a user, a throttle trigger lever slidably protruding along a lower surface of a controller provided at a head portion of the grip and for controlling forward and backward movements of the controlled body, and a steering wheel arranged on the upper surface of an end portion of the controller and for controlling right and left turns of the controlled body, wherein the steering wheel tilts and fixes its axial direction toward a particular direction with respect to the controller.

摘要翻译： 一种用于通过电磁波远程控制无线控制装置的受控体的无线控制发射器，其包括由用户的优势手掌握的手柄，沿着控制器的下表面可滑动地突出的节气门触发杆， 所述把手的头部并且用于控制所述受控体的前后运动;以及方向盘，其布置在所述控制器的端部的上表面上并且用于控制所述受控体的左右匝，其中所述方向盘 倾斜并将其轴向方向固定在相对于控制器的特定方向上。

公开(公告)号：USD486151S1

公开(公告)日：2004-02-03

申请号：US29183214

申请日：2003-06-10

申请人： Kenji Mukaida

设计人： Kenji Mukaida