公开(公告)号：US5583713A

公开(公告)日：1996-12-10

申请号：US279299

申请日：1994-07-22

申请人： Peter Real ,  Mairtin Walsh ,  Kenneth Deevy ,  Patrick Griffin ,  Philip Quinlan

发明人： Peter Real ,  Mairtin Walsh ,  Kenneth Deevy ,  Patrick Griffin ,  Philip Quinlan

IPC分类号： G01N33/53 ,  G01N33/569 ,  G01N33/68 ,  G11B5/596 ,  G11B5/09

CPC分类号： G01N33/56972 ,  G01N33/5308 ,  G01N33/6866 ,  G01N33/6869 ,  G01N33/6872

摘要： A servo system for controlling the position of a read/write head in a disk drive is provided. The servo system includes an input terminal for sequentially receiving a plurality of input signal bursts of a burst pattern, wherein the input signal bursts include positional information of the head. Demodulation circuitry, coupled to the input terminal, sequentially demodulates each input signal burst and provides a demodulated signal for each burst. An ADC, coupled to the demodulation circuitry, sequentially converts each demodulated signal. The ADC converts a first demodulated signal corresponding to the first of the plurality of input signal bursts before the demodulation circuitry completes demodulating the next of the plurality of input signal bursts. In a preferred embodiment, the ADC converts a demodulated signal corresponding to a first input signal burst while the demodulation circuitry demodulates a signal corresponding to a second, and subsequent, input signal burst. Thus, a pipelined demodulation and conversion scheme is disclosed in which time delays between demodulation and conversion are reduced. In the preferred embodiment, the demodulation circuitry includes area detect circuitry having an integration circuit and a single track-and-hold amplifier.

摘要翻译： 提供了一种用于控制磁盘驱动器中读/写磁头的位置的伺服系统。 伺服系统包括用于顺序地接收突发模式的多个输入信号突发的输入端，其中输入信号突发包括头的位置信息。 耦合到输入端的解调电路对每个输入信号脉冲串进行顺序解调，并提供每个脉冲串的解调信号。 耦合到解调电路的ADC顺序地转换每个解调信号。 在解调电路完成解调多个输入信号突发中的下一个之前，ADC转换对应于多个输入信号突发中的第一个的第一解调信号。 在优选实施例中，ADC解调对应于第一输入信号脉冲串的解调信号，同时解调电路解调对应于第二和随后的输入信号脉冲串的信号。 因此，公开了一种流水线解调和转换方案，其中解调和转换之间的时间延迟减小。 在优选实施例中，解调电路包括具有积分电路和单个跟踪和保持放大器的区域检测电路。

公开(公告)号：US5136184A

公开(公告)日：1992-08-04

申请号：US705121

申请日：1991-05-24

申请人： Kenneth Deevy

发明人： Kenneth Deevy

IPC分类号： G01R19/165 ,  H03K5/24 ,  H03M1/40

CPC分类号： H03M1/406 ,  G01R19/16519 ,  H03K5/2472

摘要： A comparator for use in an A/D converter such as an algorithmic type. The circuit includes a push-pull inverter gain stage having two series-connected MOSFETs. The input of this inverter is driven by a signal from a preceding current-comparison stage where an input current is compared to a reference current to set the signal level on an input node of the inverter. The trigger point of the inverter is altered by an additional MOSFET, connected in parallel with one of the inverter MOSFETs, and having its gate controlled by the output of a bias voltage control circuit. This circuit includes a control inverter stage matched to the comparator inverter and driven by a control current-comparison circuit matched to the corresponding comparator current-comparison circuit. The input and output nodes of the control inverter are connected to the inputs of an op-amp the output of which controls the gate voltage of an additional MOSFET in parallel with one of the control inverter MOSFETs so as to force the input and output nodes to be of equal voltage. The resulting op-amp output signal serves as the bias signal for the additional MOSFET in parallel with one of the comparator inverter MOSFETs, and sets the trigger point of the comparator inverter at a level equal to the balance point of the preceding current-comparison stage, thereby assuring fast transition times.

摘要翻译： 用于A / D转换器的比较器，例如算法类型。 该电路包括具有两个串联连接的MOSFET的推挽式逆变器增益级。 该反相器的输入由来自前一电流比较级的信号驱动，其中输入电流与参考电流进行比较，以设置反相器的输入节点上的信号电平。 逆变器的触发点由附加的MOSFET改变，该MOSFET与反相MOSFET之一并联连接，其栅极由偏置电压控制电路的输出控制。 该电路包括与比较器反相器匹配的控制逆变器级并由与对应的比较器电流比较电路匹配的控制电流比较电路驱动。 控制逆变器的输入和输出节点连接到运算放大器的输入，运算放大器的输出控制附加MOSFET的栅极电压与控制逆变器MOSFET并联，以便将输入和输出节点 具有相等的电压。 所产生的运算放大器输出信号用作与比较器反相MOSFET之一并联的附加MOSFET的偏置信号，并将比较器反相器的触发点设置在等于前一电流比较级的平衡点 从而确保快速的过渡时间。