Abstract:
A fan brake for a fan system. The fan system may include a fan assembly configured for seating into a cassette housing. The fan assembly may include a fan having a plurality of blades connected with a fan hub. The fan brake may be connected to the fan assembly, wherein the fan brake engages the fan hub when the fan housing is not fully seated within the cassette housing, and the fan brake disengages the fan hub when the fan assembly is fully seated into the cassette housing.
Abstract:
Computer memory subsystems are disclosed for enhancing signal quality that include: one or more memory modules; a memory bus; and a memory controller connected to the memory modules through the memory bus, the memory controller including a reception buffer connected to the memory bus, the reception buffer capable of receiving an input signal from one of the memory modules, the memory controller including a reception characteristics table capable of storing reception characteristics for each of the memory modules connected to the memory controller, the memory controller including an equalizer connected to the reception buffer and the reception characteristics table, the equalizer capable of equalizing the received input signal in dependence upon the reception characteristics for the memory module from which the input signal was received, and the memory controller including memory controller logic connected to the equalizer, the memory controller logic capable of processing the equalized input signal.
Abstract:
A memory switching data processing system including one or more central processing units (‘CPUs’); random access memory organized in at least two banks of memory modules; one or more memory buses providing communications paths for data among the CPUs and the memory modules; and a flexibly configurable memory bus switch comprising a first configuration adapting the first CPU to a first bank of memory modules and a second CPU to a second bank of memory modules and a second configuration adapting the first CPU to both the first bank of memory modules and the second bank of memory modules.
Abstract:
An electronic device may be provided with more than one industry-standard type of AC power connector. The electronic device may be powered in any of a variety of locations by selectively exposing one of the power connectors selected according to an AC power outlet available at that location. A location-specific power cord may be used to connect the exposed power connector to the AC power outlet. The location-specific power cord may have, for example, a line socket at one end of a type that matches the exposed power connector, and a power plug at the other end of a type that matches the AC power outlet at the location. Predefined power settings appropriate for use with the AC power outlet and the exposed power connector may be automatically invoked.
Abstract:
Methods, apparatus, and products for detecting an increase in thermal resistance of a heat sink in a computer system, the heat sink dissipating heat for a component of the computer system, the computer system including a fan controlling airflow across the heat sink, the computer system also including a temperature monitoring device, including: measuring, by a monitoring module through use of the temperature monitoring device during operation of the computer system, thermal resistance of the heat sink; determining whether the measured thermal resistance of the heat sink is greater than a threshold thermal resistance, the threshold thermal resistance stored in a thermal profile in non-volatile memory, and if the measured thermal resistance of the heat sink is greater than the threshold thermal resistance, notifying a system administrator.
Abstract:
Establishing, with a USB RAID controller connected to a USB hub and with USB mass storage devices connected to the USB hub and the USB RAID controller through USB connectors, the USB hub controlled by a USB host controller, a RAID array including enumerating, by the USB host controller, the USB mass storage devices, including discovering the USB RAID controller; receiving, by the USB RAID controller from a RAID console application program, an instruction to designate USB connectors as RAIDable USB connectors, the instruction including selected USB connectors; designating, by the USB RAID controller, the selected USB connectors as RAIDable USB connectors; enumerating by the USB RAID controller the USB mass storage devices connected to the RAIDable USB connectors; configuring by the USB RAID controller a RAID array, the RAID array including the USB mass storage devices; and storing, through the USB RAID controller, computer data on the RAID array.
Abstract:
Methods, apparatus, and products are disclosed for implementing a redundant array of inexpensive drives (‘RAID’) with an external RAID controller and hard disk drives from separate computers, including configuring by the external RAID controller a RAID array, the RAID array comprising hard disk drives from the separate computers, the external RAID controller comprising a hardware RAID controller installed externally with respect to the separate computers, and storing, by one or more of the separate computers through the external RAID controller, computer data on the RAID array.
Abstract:
Methods, apparatus, and products are disclosed for optimizing a physical data communications topology between a plurality of computing nodes, the physical data communications topology including physical links configured to connect the plurality of nodes for data communications, that include carrying out repeatedly at a predetermined pace: detecting network packets transmitted through the links between each pair of nodes in the physical data communications topology, each network packet characterized by one or more packet attributes; assigning, to each network packet, a packet weight in dependence upon the packet attributes for that network packet; determining, for each pair of nodes in the physical data communications topology, a node pair traffic weight in dependence upon the packet weights assigned to the network packets transferred between that pair of nodes; and reconfiguring the physical links between each pair of nodes in dependence upon the node pair traffic weights.
Abstract:
Methods, apparatus, and products are disclosed for optimizing a physical data communications topology between a plurality of computing nodes, the physical data communications topology including physical links configured to connect the plurality of nodes for data communications, that include carrying out repeatedly at a predetermined pace: detecting network packets transmitted through the links between each pair of nodes in the physical data communications topology, each network packet characterized by one or more packet attributes; assigning, to each network packet, a packet weight in dependence upon the packet attributes for that network packet; determining, for each pair of nodes in the physical data communications topology, a node pair traffic weight in dependence upon the packet weights assigned to the network packets transferred between that pair of nodes; and reconfiguring the physical links between each pair of nodes in dependence upon the node pair traffic weights.
Abstract:
A design structure embodied in a machine readable storage medium for designing, manufacturing, and/or testing a memory switching data processing system is provided. The memory switching data processing system includes one or more central processing units (‘CPUs’); random access memory organized in at least two banks of memory modules; one or more memory buses providing communications paths for data among the CPUs and the memory modules; and a flexibly configurable memory bus switch comprising a first configuration adapting the first CPU to a first bank of memory modules and a second CPU to a second bank of memory modules and a second configuration adapting the first CPU to both the first bank of memory modules and the second bank of memory modules.