公开(公告)号：US5097391A

公开(公告)日：1992-03-17

申请号：US599414

申请日：1990-10-18

申请人： Takeshi Nomura ,  Masaaki Ikeda ,  Shigekazu Sumita ,  Yukie Nakano ,  Kousuke Nishiyama ,  Michio Abe

发明人： Takeshi Nomura ,  Masaaki Ikeda ,  Shigekazu Sumita ,  Yukie Nakano ,  Kousuke Nishiyama ,  Michio Abe

IPC分类号： H01G4/12 ,  H01G4/30

CPC分类号： H01G4/30 ,  H01G4/1281 ,  Y10T29/435

摘要： In a ceramic multilayer chip capacitor comprising alternately stacked internal electrodes of Ni or Ni alloy and dielectric layers, an oxide layer having a different composition from the dielectric layer is formed on the periphery of each internal electrode. The dielectric layer consists essentially of grains and a grain boundary phase, the percent area of the grain boundary phase being up to 2% of the area of a cross section of the dielectric layer. The capacitor is prepared by alternately stacking Ni or Ni alloy and a dielectric material in layer form, firing and then heat treating the stack under predetermined oxygen partial pressures. The dielectric material is a barium titanate base oxide material. The capacitor has a long effective life.