公开(公告)号：US20100079194A1

公开(公告)日：2010-04-01

申请号：US12554995

申请日：2009-09-08

申请人： Iven ZHENG ,  Waley LI ,  Linpeng WEI ,  Hongwei ZHAO ,  Weiying LI

发明人： Iven ZHENG ,  Waley LI ,  Linpeng WEI ,  Hongwei ZHAO ,  Weiying LI

IPC分类号： H03K17/687

CPC分类号： H03K17/08122 ,  H02M7/538

摘要： An H bridge circuit includes a gate driver circuit coupled to a gate of an NMOS device. The output of the gate driver circuit is at a voltage from 0.1V to 0.4V during a dead time of the H bridge circuit. The gate voltage of the NMOS device is biased at 0.1˜0.4V to overcome the problems of minority carrier injection and power dissipation as compared with VG=0 in a conventional H bridge circuit.

摘要翻译： H桥电路包括耦合到NMOS器件的栅极的栅极驱动器电路。 在H桥电路的死区时间内，栅极驱动电路的输出为0.1V至0.4V的电压。 在常规H桥电路中，NMOS器件的栅极电压偏置在0.1〜0.4V，以克服少量载流子注入和功耗的问题，与VG = 0相比。

公开(公告)号：US07940092B2

公开(公告)日：2011-05-10

申请号：US12554995

申请日：2009-09-08

申请人： Iven Zheng ,  Waley Li ,  Linpeng Wei ,  Hongwei Zhao ,  Weiying Li

发明人： Iven Zheng ,  Waley Li ,  Linpeng Wei ,  Hongwei Zhao ,  Weiying Li

IPC分类号： H03K3/00

CPC分类号： H03K17/08122 ,  H02M7/538

摘要： An H bridge circuit includes a gate driver circuit coupled to a gate of an NMOS device. The output of the gate driver circuit is at a voltage from 0.1V to 0.4V during a dead time of the H bridge circuit. The gate voltage of the NMOS device is biased at 0.1˜0.4V to overcome the problems of minority carrier injection and power dissipation as compared with VG=0 in a conventional H bridge circuit.

摘要翻译： H桥电路包括耦合到NMOS器件的栅极的栅极驱动器电路。 在H桥电路的死区时间内，栅极驱动电路的输出为0.1V至0.4V的电压。 在常规H桥电路中，NMOS器件的栅极电压偏置在0.1〜0.4V，以克服少量载流子注入和功耗的问题，与VG = 0相比。