公开(公告)号：US4827400A

公开(公告)日：1989-05-02

申请号：US848513

申请日：1986-04-07

Applicant: Llewelyn S. Dunwell ,  Richard P. Brown ,  Arthur Peters ,  John L. Curley

Inventor： Llewelyn S. Dunwell ,  Richard P. Brown ,  Arthur Peters ,  John L. Curley

IPC: G06F12/02 ,  G06F12/08

CPC classification number: G06F12/0292

Abstract: A data processing system includes a logical address to a physical address translator in an extended memory management unit. A 128 word memory stores task segment descriptor words which include a base address. A 16 word memory stores corresponding present bits to indicate if the addressed task segment descriptor is present in its memory. This arrangement allows a 128 word memory to be cleared in 16 memory cycles.

Abstract translation: 数据处理系统包括到扩展存储器管理单元中的物理地址转换器的逻辑地址。 128字存储器存储包括基地址的任务段描述符字。 16字存储器存储对应的当前位以指示所寻址的任务段描述符是否存在于其存储器中。 这种布置允许在16个存储器周期中清除128个字存储器。

公开(公告)号：US4727486A

公开(公告)日：1988-02-23

申请号：US858786

申请日：1986-05-02

Applicant: Michael D. Smith ,  Llewelyn S. Dunwell ,  Richard A. Lemay ,  Robert C. Miller ,  Theodore R. Staplin, Jr. ,  William E. Woods ,  John L. Curley

Inventor： Michael D. Smith ,  Llewelyn S. Dunwell ,  Richard A. Lemay ,  Robert C. Miller ,  Theodore R. Staplin, Jr. ,  William E. Woods ,  John L. Curley

IPC: G06F12/10 ,  G06F9/00 ,  G06F9/22 ,  G06F9/30

CPC classification number: G06F12/1054

Abstract: A data processing system includes a central processor unit (CPU), a main memory and a memory management unit (MMU). Information is stored in main memory in segments, each segment being identified by a segment descriptor stored in a translation table in the MMU. Logical addresses from the CPU address segment descriptors in the MMU's translation table. These segment descriptors include the physical address of the location in main memory of the first word of the segment. If the segment descriptor is not in the translation table location, then the MMU operation is suspended while the segment descriptor is demand fetched from main memory.