公开(公告)号：US4521884A

公开(公告)日：1985-06-04

申请号：US439956

申请日：1982-11-08

申请人： Gary L. Dix ,  Lloyd S. Heim ,  Robert F. Herald ,  William P. Quinlan

发明人： Gary L. Dix ,  Lloyd S. Heim ,  Robert F. Herald ,  William P. Quinlan

IPC分类号： G11B20/10 ,  G06F11/07 ,  G11B19/04 ,  G11B20/18 ,  G06F11/00

CPC分类号： G06F11/0772 ,  G06F11/0727 ,  G11B20/18

摘要： Error information is passed across a limited interface from a disk drive to its using system by making use of the read data line during a fault mode operation. Fault mode operation is detected by a pulse width detector in an adapter between the using system and the disk drive. The pulse width detector detects the presence of a fault signal on the read data line and inhibits the passage of the spindle motor on (MTR ON) signal from the using system to the disk drive. The step signal normally used to index the recording head is passed to the disk drive during fault mode operation. A microcomputer at the disk drive detects the absence of the MTR ON signal and the presence of the step signal and outputs a fault data bit. Thereafter, the fault data word is gated onto the read data line at the rate of one bit per step of the step signal so long as the MTR ON signal is absent.

摘要翻译： 在故障模式操作期间，通过使用读取的数据线，错误信息通过有限接口从磁盘驱动器传递到其使用系统。 故障模式操作由使用系统和磁盘驱动器之间的适配器中的脉冲宽度检测器检测。 脉宽检测器检测读取数据线上是否存在故障信号，并禁止主轴电机通过（MTR ON）信号从使用系统传输到磁盘驱动器。 通常用于索引记录头的步进信号在故障模式操作期间被传递到磁盘驱动器。 磁盘驱动器上的微型计算机检测到MTR ON信号的不存在和步进信号的存在并输出故障数据位。 此后，只要MTR ON信号不存在，就以步进信号每步一位的速率将故障数据字门控在读数据线上。

公开(公告)号：US4782300A

公开(公告)日：1988-11-01

申请号：US835674

申请日：1986-03-03

申请人： Anthony R. Bonaccio ,  Brent A. Carlson ,  Lloyd S. Heim ,  Kenneth A. Moe ,  Steven A. Schmitt

发明人： Anthony R. Bonaccio ,  Brent A. Carlson ,  Lloyd S. Heim ,  Kenneth A. Moe ,  Steven A. Schmitt

IPC分类号： G01R31/02 ,  H04L25/08 ,  H04B3/46 ,  H04B17/00

CPC分类号： H04L25/085

摘要： A differential transceiver transmission line integrity detector detects both open and short circuits in the transmission lines. The two transmission lines are terminated at both ends by selected impedances. A driver coupled to each of the transmission lines drives the lines with data signals. Signal levels on the lines are detected and compared with expected levels to generate line integrity indications. Both open and short conditions are detected and indicated by the line integrity indications.

摘要翻译： 差分收发器传输线完整性检测器检测传输线路中的开路和短路。 两条传输线通过选择的阻抗在两端终止。 耦合到每个传输线的驱动器用数据信号驱动线。 检测线路上的信号电平并将其与预期电平进行比较以产生线路完整性指示。 通过线路完整性指示检测和指示开放和短路条件。

公开(公告)号：US4730251A

公开(公告)日：1988-03-08

申请号：US791884

申请日：1985-10-28

申请人： David E. Aakre ,  Douglas J. Abrahamson ,  Neil C. Berglund ,  Vincent A. Bettermann ,  Lloyd S. Heim ,  Kenneth A. Moe

发明人： David E. Aakre ,  Douglas J. Abrahamson ,  Neil C. Berglund ,  Vincent A. Bettermann ,  Lloyd S. Heim ,  Kenneth A. Moe

IPC分类号： G06F13/14 ,  G06F12/06 ,  G06F9/00

CPC分类号： G06F12/0661

摘要： An automatic address assignment system has a plurality of I/O devices coupled to a bus. Each device contains a unique machine-readable identifier which is used to select the device for address assignment. The identifier is a binary bit string. Each bit position in the bit string is selected by the host in a serial manner with the host specifying which binary value is being solicited. All devices whose identifier digit matches the solicited value respond positively and remain in contention for address assignment. The other devices will not respond and drop out of contention for address assignment until the sequence is restarted from the first bit. After the bit sequence is completed, the address for that device is bused to the device, and the sequence is restarted from the first bit until all devices have been assigned an address.

摘要翻译： 自动地址分配系统具有耦合到总线的多个I / O设备。 每个设备都包含一个独特的机器可读标识符，用于选择用于地址分配的设备。 标识符是二进制位串。 主机以串行方式选择位串中的每个位位置，主机指定要求哪个二进制值。 标识符数字与被请求值相匹配的所有设备都会积极响应，并保持争用地址分配。 其他设备不会响应并退出地址分配的争用，直到序列从第一个位重新启动。 在比特序列完成后，该设备的地址被引用到设备，并且从第一个位重新启动序列，直到所有设备都被分配了一个地址。