公开(公告)号：US4956808A

公开(公告)日：1990-09-11

申请号：US54111

申请日：1987-05-20

申请人： David E. Aakre ,  Roy L. Hoffman ,  David N. Moen ,  Quentin G. Schmierer

发明人： David E. Aakre ,  Roy L. Hoffman ,  David N. Moen ,  Quentin G. Schmierer

IPC分类号： G06F3/06 ,  G06F5/06 ,  G11B20/00

CPC分类号： G06F3/0601 ,  G06F5/06 ,  G11B20/00007 ,  G06F2003/0691

摘要： A real time data transformation and transmission apparatus transforms data from a first data device and transfers the transformed data to a second data device which need not have a data transfer rate consistent with the first data device. Data from the first data device is divided into blocks and is compressed by a compression device and written into a buffer. A controller controls the buffer to transmit compressed data to the second data device as a function of the data receiving rate of the second data medium provided that the buffer contains a predetermined amount of data. While the buffer is transmitting data, the compressor is compressing further blocks of data which are being written to the buffer such that the predetermined amount of data is stored in the buffer upon completion of the buffer transmitting a block of data. This ensures that complete blocks of data are transmitted to the second data medium at the data receiving rate of the second data medium.

摘要翻译： 实时数据变换和发送装置从第一数据装置变换数据，并将转换的数据传送到不需要与第一数据装置一致的数据传送速率的第二数据装置。 来自第一数据设备的数据被划分成块并由压缩设备压缩并写入缓冲器。 作为第二数据介质的数据接收速率的函数，如果缓冲器包含预定量的数据，则控制器控制缓冲器将压缩数据传送到第二数据设备。 当缓冲器正在发送数据时，压缩器正在将进一步的正在写入缓冲器的数据块进行压缩，使得在发送数据块的缓冲器完成时将预定量的数据存储在缓冲器中。 这确保了以第二数据介质的数据接收速率将完整的数据块发送到第二数据介质。

公开(公告)号：US4730251A

公开(公告)日：1988-03-08

申请号：US791884

申请日：1985-10-28

申请人： David E. Aakre ,  Douglas J. Abrahamson ,  Neil C. Berglund ,  Vincent A. Bettermann ,  Lloyd S. Heim ,  Kenneth A. Moe

发明人： David E. Aakre ,  Douglas J. Abrahamson ,  Neil C. Berglund ,  Vincent A. Bettermann ,  Lloyd S. Heim ,  Kenneth A. Moe

IPC分类号： G06F13/14 ,  G06F12/06 ,  G06F9/00

CPC分类号： G06F12/0661

摘要： An automatic address assignment system has a plurality of I/O devices coupled to a bus. Each device contains a unique machine-readable identifier which is used to select the device for address assignment. The identifier is a binary bit string. Each bit position in the bit string is selected by the host in a serial manner with the host specifying which binary value is being solicited. All devices whose identifier digit matches the solicited value respond positively and remain in contention for address assignment. The other devices will not respond and drop out of contention for address assignment until the sequence is restarted from the first bit. After the bit sequence is completed, the address for that device is bused to the device, and the sequence is restarted from the first bit until all devices have been assigned an address.

摘要翻译： 自动地址分配系统具有耦合到总线的多个I / O设备。 每个设备都包含一个独特的机器可读标识符，用于选择用于地址分配的设备。 标识符是二进制位串。 主机以串行方式选择位串中的每个位位置，主机指定要求哪个二进制值。 标识符数字与被请求值相匹配的所有设备都会积极响应，并保持争用地址分配。 其他设备不会响应并退出地址分配的争用，直到序列从第一个位重新启动。 在比特序列完成后，该设备的地址被引用到设备，并且从第一个位重新启动序列，直到所有设备都被分配了一个地址。