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公开(公告)号:US10200041B2
公开(公告)日:2019-02-05
申请号:US15340423
申请日:2016-11-01
申请人: Jeremy R. Gorbold , Christian Steffen Birk , Gerard Mora Puchalt , Colin Charles Price , Michael C. W. Coln , Mahesh Madhavan Kumbaranthodiyil
发明人: Jeremy R. Gorbold , Christian Steffen Birk , Gerard Mora Puchalt , Colin Charles Price , Michael C. W. Coln , Mahesh Madhavan Kumbaranthodiyil
IPC分类号: H03K17/00 , H03K19/0185 , H03K17/693
摘要: An analog multiplexer may be used for sampling an input voltage that is capable of having a higher voltage level than an upper supply voltage. The analog multiplexer includes a plurality of input switch circuits and a shorting switch circuit. The plurality of input switch circuits include n-type or p-type laterally diffused field effect transistors (NLDFETs or PLDFETs). At least one of the input switch circuits includes a level shifting switch circuit that is able to sample an input voltage that is greater than the upper supply voltage for the multiplexer. A shorting switch circuit, at an output of the multiplexer, includes a capacitively coupled gate drive circuit and is configured to short a first differential output to a second differential output after the input voltage is sampled.
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公开(公告)号:US20180123591A1
公开(公告)日:2018-05-03
申请号:US15340423
申请日:2016-11-01
申请人: Jeremy R. Gorbold , Christian Steffen Birk , Gerard Mora Puchalt , Colin Charles Price , Michael C.W. Coln , Mahesh Madhavan Kumbaranthodiyil
发明人: Jeremy R. Gorbold , Christian Steffen Birk , Gerard Mora Puchalt , Colin Charles Price , Michael C.W. Coln , Mahesh Madhavan Kumbaranthodiyil
IPC分类号: H03K19/0185 , H03K17/693
CPC分类号: H03K19/018507 , H03K17/063 , H03K17/693 , H03K2217/0054 , H03M1/1245
摘要: An analog multiplexer may be used for sampling an input voltage that is capable of having a higher voltage level than an upper supply voltage. The analog multiplexer includes a plurality of input switch circuits and a shorting switch circuit. The plurality of input switch circuits include n-type or p-type laterally diffused field effect transistors (NLDFETs or PLDFETs). At least one of the input switch circuits includes a level shifting switch circuit that is able to sample an input voltage that is greater than the upper supply voltage for the multiplexer. A shorting switch circuit, at an output of the multiplexer, includes a capacitively coupled gate drive circuit and is configured to short a first differential output to a second differential output after the input voltage is sampled.
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公开(公告)号:US20090102694A1
公开(公告)日:2009-04-23
申请号:US12254678
申请日:2008-10-20
IPC分类号: H03M1/34
CPC分类号: H03M1/462 , H03M1/0673 , H03M1/468 , H03M1/687
摘要: The analog-to-digital for converter (ADC) for converting an analog value into a digital equivalent using a parallel digital data path is disclosed. In one example embodiment, the ADC includes a switched capacitor DAC having an input to receive an analog value via analog sample and hold circuit. A comparator is coupled to the switched capacitor DAC. A successive approximation register (SAR) is coupled to the comparator. A plurality of logic blocks is coupled to the SAR. A plurality of thermometric encoders is coupled to the associated plurality of logic blocks. A plurality of MUXs is coupled to the associated plurality of thermometric encoders and the comparator, wherein the plurality of MUXs having associated outputs that is coupled to the input of the switched capacitor DAC.
摘要翻译: 公开了用于使用并行数字数据路径将模拟值转换成数字等效的用于转换器(ADC)的模拟数字转换器。 在一个示例实施例中,ADC包括具有经由模拟采样和保持电路接收模拟值的输入的开关电容器DAC。 比较器耦合到开关电容器DAC。 逐次逼近寄存器(SAR)耦合到比较器。 多个逻辑块耦合到SAR。 多个温度测量编码器耦合到相关联的多个逻辑块。 多个MUX耦合到相关联的多个温度测量编码器和比较器,其中多个MUX具有耦合到开关电容器DAC的输入的相关输出。
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4.
公开(公告)号:US07439898B1
公开(公告)日:2008-10-21
申请号:US11755761
申请日:2007-05-31
IPC分类号: H03M1/34
CPC分类号: H03M1/462 , H03M1/0673 , H03M1/468 , H03M1/687
摘要: The analog-to-digital for converter (ADC) for converting an analog value into a digital equivalent using a parallel digital data path is disclosed. In one example embodiment, the ADC includes a switched capacitor DAC having an input to receive an analog value via analog sample and hold circuit. A comparator is coupled to the switched capacitor DAC. A successive approximation register (SAR) is coupled to the comparator. A plurality of logic blocks is coupled to the SAR. A plurality of thermometric encoders is coupled to the associated plurality of logic blocks. A plurality of MUXs is coupled to the associated plurality of thermometric encoders and the comparator, wherein the plurality of MUXs having associated outputs that is coupled to the input of the switched capacitor DAC.
摘要翻译: 公开了用于使用并行数字数据路径将模拟值转换成数字等效的用于转换器(ADC)的模拟数字转换器。 在一个示例实施例中,ADC包括具有经由模拟采样和保持电路接收模拟值的输入的开关电容器DAC。 比较器耦合到开关电容器DAC。 逐次逼近寄存器(SAR)耦合到比较器。 多个逻辑块耦合到SAR。 多个温度测量编码器耦合到相关联的多个逻辑块。 多个MUX耦合到相关联的多个温度测量编码器和比较器,其中多个MUX具有耦合到开关电容器DAC的输入的相关输出。
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公开(公告)号:US07839319B2
公开(公告)日:2010-11-23
申请号:US12254678
申请日:2008-10-20
IPC分类号: H03M1/34
CPC分类号: H03M1/462 , H03M1/0673 , H03M1/468 , H03M1/687
摘要: The analog-to-digital for converter (ADC) for converting an analog value into a digital equivalent using a parallel digital data path is disclosed. In one example embodiment, the ADC includes a switched capacitor DAC having an input to receive an analog value via analog sample and hold circuit. A comparator is coupled to the switched capacitor DAC. A successive approximation register (SAR) is coupled to the comparator. A plurality of logic blocks is coupled to the SAR. A plurality of thermometric encoders is coupled to the associated plurality of logic blocks. A plurality of MUXs is coupled to the associated plurality of thermometric encoders and the comparator, wherein the plurality of MUXs having associated outputs that is coupled to the input of the switched capacitor DAC.
摘要翻译: 公开了用于使用并行数字数据路径将模拟值转换成数字等效的用于转换器(ADC)的模拟数字转换器。 在一个示例实施例中,ADC包括具有经由模拟采样和保持电路接收模拟值的输入的开关电容器DAC。 比较器耦合到开关电容器DAC。 逐次逼近寄存器(SAR)耦合到比较器。 多个逻辑块耦合到SAR。 多个温度测量编码器耦合到相关联的多个逻辑块。 多个MUX耦合到相关联的多个温度测量编码器和比较器,其中多个MUX具有耦合到开关电容器DAC的输入的相关输出。
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