公开(公告)号：US08839061B2

公开(公告)日：2014-09-16

申请号：US13762344

申请日：2013-02-07

Applicant: Puneet Dodeja ,  Vishal Gupta ,  Manish Kumar Mittal

Inventor： Puneet Dodeja ,  Vishal Gupta ,  Manish Kumar Mittal

IPC: G01R31/28 ,  G01R31/3177

CPC classification number: G01R31/3177 ,  G01R31/318583 ,  G06F17/505 ,  G06F2217/14

Abstract: A system for re-ordering a scan chain of an electronic circuit design using an electronic design automation (EDA) tool includes a processor and a memory in communication with the processor. The scan chain includes a plurality of scan cells. All connections of the scan chain are disconnected. An output port of a first scan cell is connected to input ports of other scan cells to form a first set of scan cell combinations. A first scan cell combination is selected from the first set of scan cell combinations based on weighted averages of ordering parameters of each of the first set of scan cell combinations. The process is repeated to re-order the scan chain.

Abstract translation: 使用电子设计自动化（EDA）工具重新排序电子电路设计的扫描链的系统包括处理器和与处理器通信的存储器。 扫描链包括多个扫描单元。 扫描链的所有连接都断开连接。 第一扫描单元的输出端口连接到其它扫描单元的输入端口以形成第一组扫描单元组合。 基于第一组扫描单元组合的排序参数的加权平均值，从第一组扫描单元组合中选择第一扫描单元组合。 重复该过程以重新排序扫描链。

公开(公告)号：US20140223249A1

公开(公告)日：2014-08-07

申请号：US13762344

申请日：2013-02-07

Applicant: Puneet Dodeja ,  Vishal Gupta ,  Manish Kumar Mittal

Inventor： Puneet Dodeja ,  Vishal Gupta ,  Manish Kumar Mittal

IPC: G01R31/3177

CPC classification number: G01R31/3177 ,  G01R31/318583 ,  G06F17/505 ,  G06F2217/14

Abstract: A system for re-ordering a scan chain of an electronic circuit design using an electronic design automation (EDA) tool includes a processor and a memory in communication with the processor. The scan chain includes a plurality of scan cells. All connections of the scan chain are disconnected. An output port of a first scan cell is connected to input ports of other scan cells to form a first set of scan cell combinations. A first scan cell combination is selected from the first set of scan cell combinations based on weighted averages of ordering parameters of each of the first set of scan cell combinations. The process is repeated to re-order the scan chain.

Abstract translation: 使用电子设计自动化（EDA）工具重新排序电子电路设计的扫描链的系统包括处理器和与处理器通信的存储器。 扫描链包括多个扫描单元。 扫描链的所有连接都断开连接。 第一扫描单元的输出端口连接到其它扫描单元的输入端口以形成第一组扫描单元组合。 基于第一组扫描单元组合的排序参数的加权平均值，从第一组扫描单元组合中选择第一扫描单元组合。 重复该过程以重新排序扫描链。