Digital timing control system with memory look ahead
    1.
    发明授权
    Digital timing control system with memory look ahead 失效
    具有内存的数字时序控制系统展望未来

    公开(公告)号:US4692877A

    公开(公告)日:1987-09-08

    申请号:US879247

    申请日:1986-06-27

    IPC分类号: H04N1/113 H04N1/053 H04N1/27

    摘要: A pel timing clock compensates for the non-linear displacement profile of a resonant galvanometerscanner. A pel time counter is loaded with a count value and outputs a clock pulse after expiration of a delay serial determined by the count value. Each time the clock pulse is produced the pel time counter is reloaded. The various count values are accessed from a memory which is addressed by an address counter whose contents are also altered each time the clock pulse is produced. The memory stores a sequence of count values which, when used to load the pel time counter, produces the desired sequence of clock pulses to compensate for the non-linear displacement profile of the scanner.

    摘要翻译: 像素定时时钟补偿了谐振电流计的非线性位移曲线。 像素时间计数器装载有计数值,并且在由计数值确定的延迟串行期满之后输出时钟脉冲。 每次产生时钟脉冲时,重新加载像素计时器。 各种计数值从存储器访问,该存储器由地址计数器寻址,其每当产生时钟脉冲时其内容也被改变。 存储器存储一系列计数值,当用于加载像差计时器时,产生期望的时钟脉冲序列以补偿扫描器的非线性位移分布。