公开(公告)号：US6026194A

公开(公告)日：2000-02-15

申请号：US969017

申请日：1997-11-12

申请人： Yuji Torikai ,  Masaaki Tanioka ,  Narihiro Matoba

发明人： Yuji Torikai ,  Masaaki Tanioka ,  Narihiro Matoba

IPC分类号： H04N19/00 ,  G06T9/00 ,  H04N1/41 ,  H04N19/42 ,  H04N19/423 ,  H04N19/90 ,  H04N19/98 ,  G06K9/36

CPC分类号： G06T9/00

摘要： When image data of the first line is input, compressor 102 compresses the input image data by every prescribed number of pixels corresponding to the number of pixels included in column direction of one block, and the compressed data is stored in the corresponding region of a memory 104, under the control of control circuit 108. For the second and following lines, the compressed data of the last line which has been compressed and stored in the memory 104 and the input data are received by the compressor 102, and the compressor 102 integrates and compresses the received data, and the compressed result is stored in the corresponding memory region of the memory 104.

摘要翻译： 当输入第一行的图像数据时，压缩器102按照与包含在一个块的列方向上的像素数相对应的每个规定数量的像素来压缩输入图像数据，并且将压缩数据存储在存储器的相应区域中 对于第二行和以下行，已压缩并存储在存储器104中的最后一行的压缩数据和输入数据被压缩机102接收，并且压缩器102将 并压缩接收到的数据，压缩结果被存储在存储器104的对应的存储区域中。

公开(公告)号：US5912742A

公开(公告)日：1999-06-15

申请号：US667965

申请日：1996-06-19

申请人： Narihiro Matoba ,  Masaru Ohnishi ,  Masaaki Tanioka ,  Yukio Kodama ,  Yoshifumi Imanaka ,  Hiroaki Furuta ,  Eisaku Tomita

发明人： Narihiro Matoba ,  Masaru Ohnishi ,  Masaaki Tanioka ,  Yukio Kodama ,  Yoshifumi Imanaka ,  Hiroaki Furuta ,  Eisaku Tomita

IPC分类号： G06T9/00 ,  H04N1/41 ,  H04N1/415

CPC分类号： G06T9/005

摘要： A line buffer device temporarily stores a predetermined area of original image data which are divided into small blocks, each having a small area, so as to encode the image data for each block into data having a fixed length by a compression processor. The line buffer device is composed of a first-stage line buffer group and a second-stage line buffer group. The number of line buffers in the first-stage line buffer group is smaller by one than the number of lines constituting one block and the number of line buffers in the second-stage line buffer group is the same as the number of lines constituting one block. Encoding processing time is shortened and the circuit structure is simplified.

摘要翻译： 行缓冲装置临时存储分割成小区域的小块的原始图像数据的预定区域，以便通过压缩处理器将每个块的图像数据编码为具有固定长度的数据。 线路缓冲器由第一级线路缓冲器组和第二级线路缓冲器组成。 第一级行缓冲器组中的行缓冲器的数量小于构成一个块的行数，并且第二级行缓冲器组中的行缓冲器的数量与构成一个块的行数相同 。 缩短编码处理时间，简化电路结构。

公开(公告)号：US5764373A

公开(公告)日：1998-06-09

申请号：US205295

申请日：1994-03-02

申请人： Narihiro Matoba ,  Masaru Ohnishi ,  Masaaki Tanioka ,  Yukio Kodama ,  Yoshifumi Imanaka ,  Hiroaki Furuta ,  Eisaku Tomita

发明人： Narihiro Matoba ,  Masaru Ohnishi ,  Masaaki Tanioka ,  Yukio Kodama ,  Yoshifumi Imanaka ,  Hiroaki Furuta ,  Eisaku Tomita

IPC分类号： G06T9/00 ,  H04N1/41 ,  H04N1/415

CPC分类号： G06T9/005

摘要： A line buffer device temporarily stores a predetermined area of original image data which are divided into small blocks, each having a small area, so as to encode the image data for each block into data having a fixed length by a compression processor. The line buffer device is composed of a first-stage line buffer group and a second-stage line buffer group. The number of line buffers in the first-stage line buffer group is smaller by one than the number of lines constituting one block and the number of line buffers in the second-stage line buffer group is the same as the number of lines constituting one block. Encoding processing time is shortened and the circuit structure is simplified.

公开(公告)号：US06263111B1

公开(公告)日：2001-07-17

申请号：US09195120

申请日：1998-11-18

申请人： Narihiro Matoba ,  Masaru Ohnishi ,  Masaaki Tanioka ,  Yukio Kodama ,  Yoshifumi Imanaka ,  Hiroaki Furuta ,  Eisaku Tomita

发明人： Narihiro Matoba ,  Masaru Ohnishi ,  Masaaki Tanioka ,  Yukio Kodama ,  Yoshifumi Imanaka ,  Hiroaki Furuta ,  Eisaku Tomita

IPC分类号： H04N141

CPC分类号： G06T9/005

摘要： A line buffer device temporarily stores a predetermined area of original image data which are divided into small blocks, each having a small area, so as to encode the image data for each block into data having a fixed length by a compression processor. The line buffer device is composed of a first-stage line buffer group and a second-stage line buffer group. The number of line buffers in the first-stage line buffer group is smaller by one than the number of lines constituting one block and the number of line buffers in the second-stage line buffer group is the same as the number of lines constituting one block. Encoding processing time is shortened and the circuit structure is simplified.

摘要翻译： 行缓冲装置临时存储分割成小区域的小块的原始图像数据的预定区域，以便通过压缩处理器将每个块的图像数据编码为具有固定长度的数据。 线路缓冲器由第一级线路缓冲器组和第二级线路缓冲器组成。 第一级行缓冲器组中的行缓冲器的数量小于构成一个块的行数，并且第二级行缓冲器组中的行缓冲器的数量与构成一个块的行数相同 。 编码处理时间缩短，电路结构简化。