Reduced power consumption for embedded processor
    1.
    发明授权
    Reduced power consumption for embedded processor 有权
    降低嵌入式处理器的功耗

    公开(公告)号:US07206954B2

    公开(公告)日:2007-04-17

    申请号:US10361464

    申请日:2003-02-10

    IPC分类号: G06F1/32

    摘要: An embedded processor system including at least one gated power unit including an internal ROM and a power controller that provides one or more gated power signals to selectively provide power to each gated power unit. The power controller provides a gated clock signal to the embedded processor to selectively control power consumption of the processor. The power controller powers down each gated power unit after freezing the processor and then powers up each gated power unit before reactivating the processor. The embedded processor system may include isolation circuitry, such as clamp circuitry or the like, that is operative to minimize current flow into each gated power unit when powered down. The gated power units may include a static function. The ROM of an embedded ROM-based microprocessor system is powered down when the microprocessor is idle to reduce or otherwise eliminate intrinsic leakage.

    摘要翻译: 一种嵌入式处理器系统,包括至少一个门控功率单元,其包括内部ROM和功率控制器,所述功率控制器提供一个或多个门控功率信号以选择性地为每个门控功率单元提供功率。 功率控制器向嵌入式处理器提供门控时钟信号以选择性地控制处理器的功耗。 电源控制器在冷冻处理器后关闭每个门控功率单元,然后在重新激活处理器之前上电每个门控功率单元。 嵌入式处理器系统可以包括诸如钳位电路等的隔离电路,其可操作以在断电时使流入每个门控功率单元的电流最小化。 门控功率单元可以包括静态功能。 当微处理器空闲以减少或以其他方式消除固有泄漏时,嵌入式基于ROM的微处理器系统的ROM被断电。