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1.发明授权Device for displaying a waveform with variable persistence and method of providing the same 有权用于显示具有可变持久性的波形的装置及其提供方法公开(公告)号：US08810608B2
公开(公告)日：2014-08-19
申请号：US12830645
申请日：2010-07-06
申请人： Matthew S. Holcomb
发明人： Matthew S. Holcomb
CPC分类号： G09G5/393 , G01R13/0227
摘要： A device includes a memory storing a persistence bit for each of a plurality of pixels of a display device, the persistence bit having a first value when a corresponding pixel should be illuminated for displaying a persistent image, and having a second value when the corresponding pixel should not be illuminated for the persistent image; a pseudorandom pixel value generator which during each video frame receives a seed value and generates pseudorandom pixel values for the plurality of pixels, each pseudorandom pixel value being not greater than a specified variable persistence value; a frame value generator outputting a frame value for each video frame; and a match detector which, during each video frame, compares the frame value to the pseudorandom pixel values for the plurality of pixels, and for each pixel where the comparison indicates a match, makes the persistence bit for the corresponding pixel have the second value.
摘要翻译： 一种设备包括存储显示设备的多个像素中的每一个的持久性位的存储器，当相应的像素应被照亮以显示持续图像时，该持续位具有第一值，并且当相应的像素 不应该照亮持久性图像; 伪随机像素值生成器，其在每个视频帧期间接收种子值并生成所述多个像素的伪随机像素值，每个伪随机像素值不大于指定的可变持续值; 输出每个视频帧的帧值的帧值生成器; 以及匹配检测器，其在每个视频帧期间将帧值与多个像素的伪随机像素值进行比较，并且对于比较指示匹配的每个像素，使得对应像素的持续位具有第二值。
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2.发明授权公开(公告)号：US06720895B2
公开(公告)日：2004-04-13
申请号：US10061138
申请日：2002-02-01
IPC分类号： H03M110
CPC分类号： H03M1/1071 , H03M1/0692 , H03M1/1061 , H03M1/447
摘要： A method of calibrating a high-speed analog to digital converter and an ADC that implements the method. Multiple linear regression analysis is used to calibrate the stages of a pipeline ADC to compensate for variations in gain from stage to stage and optionally to compensate for harmonic distortion. Current amplifiers each having gain of about 1.6 are used for low power consumption, minimal surface area requirements, and rapid sampling speed. Weighting factors are stored in lookup tables to minimize the number of adders required to generate the output digital word.
摘要翻译： 一种校准高速模数转换器和实现该方法的ADC的方法。 多重线性回归分析用于校准流水线ADC的阶段，以补偿从阶段到阶段的增益变化，并可选地补偿谐波失真。 每个增益约为1.6的电流放大器用于低功耗，最小表面积要求和快速采样速度。 加权因子存储在查找表中以最小化生成输出数字字所需的加法器数量。
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公开(公告)号：US5686846A
公开(公告)日：1997-11-11
申请号：US660313
申请日：1996-06-07
CPC分类号： G01R13/32
摘要： An oscilloscope has a trigger circuit which is operable in any one of three different modes. The trigger circuit has a number of edge detect circuits which generate pulses in response to a rising edge, falling edge, or both rising and falling edges of one or more signals. The trigger circuit has a multiplexer which routes one of three signal sources depending upon the selected mode. With a first mode, the multiplexer routes signals from a pattern detect circuit and the trigger circuit operates in a conventional manner to trigger based on the duration of the signal. In the second mode, the multiplexer routes signals from one edge detect circuit and the trigger circuit measures the frequency or rate of the signal. In the third mode, the multiplexer routes signals from a flip-flop which generates a pulse based upon the outputs from two different edge detect circuits and can be configured to measure setup or hold violations between two signals. The trigger circuit according to the invention can therefore trigger on events more complex than just the duration of a signal and provides this triggering ability without the need for any instrument or circuitry external to the oscilloscope.
摘要翻译： 示波器具有可在三种不同模式中的任何一种中操作的触发电路。 触发电路具有响应于一个或多个信号的上升沿，下降沿或上升沿和下降沿产生脉冲的多个边沿检测电路。 触发电路具有多路复用器，其根据所选择的模式路由三个信号源之一。 利用第一模式，多路复用器将来自模式检测电路的信号进行路由，并且触发电路以常规方式工作以基于信号的持续时间来触发。 在第二模式中，多路复用器从一个边缘检测电路路由信号，并且触发电路测量信号的频率或速率。 在第三模式中，多路复用器根据来自两个不同边缘检测电路的输出产生脉冲的触发器路由信号，并且可被配置为测量两个信号之间的建立或保持违规。 因此，根据本发明的触发电路因此可以触发比仅仅信号持续时间更复杂的事件，并且提供这种触发能力，而不需要示波器外部的任何仪器或电路。
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公开(公告)号：US10197600B2
公开(公告)日：2019-02-05
申请号：US13097491
申请日：2011-04-29
摘要： An oscilloscope includes at least one demonstration signal generator integrated as part of the oscilloscope. The demonstration signal generator generates stimulus signals that consist of digital samples of various different stored waveforms without the need of a separate demonstration board or signal source. The demonstration signal generator may loop through different sections of the stored waveforms to generate respective stimulus signals that include sequences of digital samples from the different waveforms in combination, to provide a broad range of stimulus signals. The stimulus signals may be displayed on the oscilloscope or output from the oscilloscope as demonstration mode stimulus signals to demonstrate the capabilities of the oscilloscope to customers or for training.
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公开(公告)号：US6026350A
公开(公告)日：2000-02-15
申请号：US707803
申请日：1996-08-30
IPC分类号： G01R13/32 , G01R13/34 , G01R31/3177 , G06F11/25 , G06F11/00
CPC分类号： G01R31/3177 , G01R13/345 , G06F11/25 , G01R13/32
摘要： A self-framing serial trigger within an oscilloscope or specialized analyzer construes an absence of the data's clock signal for at least a selected length of time as implying the occurrence of a framing signal. This frees the serial trigger from otherwise needing an externally supplied framing signal. The serial trigger may include a shift register containing the most recent N-bits of the data, which is then bit-wise compared to the trigger pattern (stored in a register). This level of comparison may provide for don't care bits in the trigger pattern. The results of this bit-wise comparison are then inspected for a certain uniformity indicating that the trigger pattern has been matched. An additional circuit may count clock signals since the last implied framing pulse. If this additional count has not yet reached M (or counted down from M to zero) the match is premature, and no trigger signal is generated. The implied framing signal itself may be generated by loading a down counter with a preselected value each time a selected edge occurs in the clock for the data. The down counter is clocked by a high speed clock running several times faster than the clock for the data. If the down counter ever reaches zero a framing pulse is implied. The implied framing pulse may be generated by decoding a value of zero in the down counter.
摘要翻译： 示波器或专用分析仪中的自构式串行触发器在至少选定的时间长度内解释数据时钟信号的缺失，这意味着成帧信号的出现。 这将释放串行触发，否则需要外部提供的成帧信号。 串行触发可以包括包含数据的最新N位的移位寄存器，然后与触发模式（存储在寄存器中）进行比特比较。 该级别的比较可以提供触发模式中的无关位。 然后对该比特比较的结果进行检查，以确定触发模式已经匹配的一定均匀性。 附加电路可以计数自最后一个隐含成帧脉冲的时钟信号。 如果这个附加计数尚未达到M（或从M向下计数到零），则匹配过早，并且不产生触发信号。 隐含的成帧信号本身可以通过每当在数据的时钟中出现所选边缘时加载具有预选值的递减计数器来产生。 下降计数器由高速时钟提供时钟，数据速度比数据的时钟快几倍。 如果向下计数器达到零，则暗示一个成帧脉冲。 可以通过在向下计数器中解码零值来产生隐含的成帧脉冲。
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6.发明授权Digital oscilloscope with pan and zoom produced from time stamped data records indexed by trigger offset 失效数字示波器具有平移和缩放，由触发偏移索引的时间戳数据记录产生
公开(公告)号：US5877621A
公开(公告)日：1999-03-02
申请号：US641244
申请日：1996-04-30
CPC分类号： G01R13/345
摘要： Each acquisition record in a random repetitive oscilloscope is time stamped and stored in a location in the acquisition memory indexed by the associated value of trigger offset. Those acquisition records that are older than a selected and variable amount can be discarded instead of being used to contribute data to the waveform record. This has the effect of preventing old data from intruding into a new measurement. When reformulating the waveform record to pan or zoom while using data already acquired, it is possible to ensure that the newest waveform records are included in that reformulation. This has the effect of ensuring that new data is displayed. The time stamp may be a binary count of an elapsed time interval, in units of the sample clock, since some cardinal event, such as the last time ERASE or RESET was pressed. To maximize the random distribution of the trigger offsets represented in the acquisition memory, the rule for deciding which of m-many acquisition records receives this latest data is based on the trigger offset. The first of the acquisition records gets acquisitions whose trigger offsets are at least zero but less than 1/m of a sample period t, the second receives acquisitions whose trigger offsets are at least t/m but less than 2 t/m, and so on.
摘要翻译： 随机重复示波器中的每个采集记录被时间标记并存储在由相关联的触发偏移值索引的采集存储器中的位置。 可以丢弃比选择和可变量更早的采集记录，而不是用于向波形记录提供数据。 这具有防止旧数据侵入新测量的效果。 在使用已经获取的数据时，将波形记录重新设置为平移或缩放时，可以确保在该重新配置中包含最新的波形记录。 这具有确保显示新数据的效果。 因为某些基本事件（例如最后一次ERASE或RESET）被按下，所以时间戳可以是以采样时钟为单位的经过时间间隔的二进制计数。 为了最大化在采集存储器中表示的触发偏移的随机分布，用于决定m个许多采集记录中的哪一个接收该最新数据的规则基于触发偏移。 采集记录中的第一个获取采样周期t至少为零但小于1 / m的采集，第二个采集的触发偏移量至少为t / m但小于2 t / m， 上。
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7.发明授权Method of rapidly displaying large data records retrieved by deep memory digital oscilloscopes and logic analyzers 失效快速显示深存数字示波器和逻辑分析仪检索的大数据记录的方法
公开(公告)号：US5790133A
公开(公告)日：1998-08-04
申请号：US607671
申请日：1996-02-27
CPC分类号： G01R13/20
摘要： A method, and circuit for implementing the method, allow a deep memory digital oscilloscope or logic analyzer to rapidly display large data records. Incoming signals are "dually" processed through multiple data compression circuits so as to create and store at least two data records. A smaller record is available for immediate and rapid display. A larger record is available for subsequent panning & zooming. By storing sequential data records in alternating memory divisions and eliminating data moves, the larger record may also be viewed more rapidly.
摘要翻译： 实现该方法的方法和电路允许深存储数字示波器或逻辑分析仪快速显示大数据记录。 通过多个数据压缩电路“双重”处理进入的信号，以创建和存储至少两个数据记录。 更小的记录可用于即时和快速显示。 更大的记录可用于后续的平移和缩放。 通过将顺序数据记录存储在交替的存储器划分中并消除数据移动，也可以更快速地查看较大的记录。
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8.发明授权Method for reducing display locking in digital oscilloscopes or logic analyzers using inter-acquisition dithering techniques 失效使用采集间抖动技术减少数字示波器或逻辑分析仪中显示锁定的方法
公开(公告)号：US5754439A
公开(公告)日：1998-05-19
申请号：US578503
申请日：1995-12-26
CPC分类号： G01R13/345 , G01R13/32
摘要： In a test instrument, display locking is reduced by the addition of a non-constant time delay to each acquisition cycle. The time delay may be randomly chosen or follow a predetermined algorithm. Decreased system throughput caused by the addition of a non-constant time delay may be minimized by alternately storing acquired data in two acquisition memories. Display locking may also be reduced by rejecting selected triggers. The data acquired from these selected triggers is not processed for display. The triggers whose data is not processed for display may be randomly chosen or they may be chosen by a predetermined algorithm. Rejecting triggers and the addition of a non-constant time delay may be used in combination or individually to reduce display locking.
摘要翻译： 在测试仪器中，通过在每个采集周期添加非恒定的时间延迟来减少显示锁定。 时间延迟可以是随机选择的或遵循预定的算法。 通过将获取的数据交替存储在两个采集存储器中，可以使通过添加非恒定时间延迟引起的系统吞吐量减小。 也可以通过拒绝所选择的触发来减少显示锁定。 从这些选择的触发获得的数据不被处理以进行显示。 其数据未被处理以用于显示的触发器可以是随机选择的，或者它们可以通过预定算法来选择。 可以组合或单独使用拒绝触发和添加非常时间延迟来减少显示锁定。
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公开(公告)号：US09804200B2
公开(公告)日：2017-10-31
申请号：US13397338
申请日：2012-02-15
申请人： Daniel P. Timm , Marshall Boss , Matthew S. Holcomb , Steven J. Pelelo , Kristopher A. Larsen , Michael R. Fender
发明人： Daniel P. Timm , Marshall Boss , Matthew S. Holcomb , Steven J. Pelelo , Kristopher A. Larsen , Michael R. Fender
CPC分类号： G01R13/0272 , G01R13/0236
摘要： A digital oscilloscope comprises a sampling unit configured to sample an input signal received from an oscilloscope probe to produce a first stream of digital samples, a first acquisition system configured to store and process the stream of digital samples to produce a first data set, a second acquisition system configured to store and process the first stream of digital samples independent of the first acquisition system to produce a second data set, and a display system configured to concurrently display the first data set in a first format and the second data set in a second format different from the first format.
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10.发明申请DEVICE FOR DISPLAYING A WAVEFORM WITH VARIABLE PERSISTENCE AND METHOD OF PROVIDING THE SAME 有权用于显示具有可变持续时间的波形的装置及其提供的方法公开(公告)号：US20120007874A1
公开(公告)日：2012-01-12
申请号：US12830645
申请日：2010-07-06
申请人： Matthew S. HOLCOMB
发明人： Matthew S. HOLCOMB
IPC分类号： G09G5/36
CPC分类号： G09G5/393 , G01R13/0227
摘要： A device includes a memory storing a persistence bit for each of a plurality of pixels of a display device, the persistence bit having a first value when a corresponding pixel should be illuminated for displaying a persistent image, and having a second value when the corresponding pixel should not be illuminated for the persistent image; a pseudorandom pixel value generator which during each video frame receives a seed value and generates pseudorandom pixel values for the plurality of pixels, each pseudorandom pixel value being not greater than a specified variable persistence value; a frame value generator outputting a frame value for each video frame; and a match detector which, during each video frame, compares the frame value to the pseudorandom pixel values for the plurality of pixels, and for each pixel where the comparison indicates a match, makes the persistence bit for the corresponding pixel have the second value.
摘要翻译： 一种设备包括存储显示设备的多个像素中的每一个的持久性位的存储器，当相应的像素应被照亮以显示持续图像时，该持续位具有第一值，并且当相应的像素 不应该照亮持久性图像; 伪随机像素值生成器，其在每个视频帧期间接收种子值并生成所述多个像素的伪随机像素值，每个伪随机像素值不大于指定的可变持续值; 输出每个视频帧的帧值的帧值生成器; 以及匹配检测器，其在每个视频帧期间将帧值与多个像素的伪随机像素值进行比较，并且对于比较指示匹配的每个像素，使得对应像素的持续位具有第二值。
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